I've been poking around a bit more on system I'm attempting to port and started doing a detailed comparison between the FSP settings from the stock BIOS and what Coreboot is using. In going through the FSP settings, I'm noticing there are a few pointers to external tables that aren't very well documented.
For example, the CoffeeLake FSP has "ChipsetInitBinPtr" / "ChipsetInitBinLen" fields, but their documentation doesn't seem to say anything beyond the names. Couldn't find any other code referencing these.
Anybody know what these are?
Hi,
ChipsetInitBinary is something consumed by ME. You may find references of it in the FITc/FIT/mFIT, where you can integrate that binary as a part of ME image.
Intel distributes a separate toolkit to generate a ChipsetInitBinary. Mostly the binary comprises of voltage settings for some pads and USB tuning.
Apparently FSP can take an external ChipsetInitBinary to override the settings from the integrated ChipsetInitBinary in the ME.
On 4/7/24 23:56, mr gadha via coreboot wrote:
I've been poking around a bit more on system I'm attempting to port and started doing a detailed comparison between the FSP settings from the stock BIOS and what Coreboot is using. In going through the FSP settings, I'm noticing there are a few pointers to external tables that aren't very well documented.
For example, the CoffeeLake FSP has "ChipsetInitBinPtr" / "ChipsetInitBinLen" fields, but their documentation doesn't seem to say anything beyond the names. Couldn't find any other code referencing these.
Anybody know what these are?
coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org
Best regards,