Dear coreboot readers!
This is the automated build check service of coreboot.
The developer "uwe" checked in revision 3335 to the coreboot source repository and caused the following changes:
Change Log: Add post-RAM init code for the Fintek F71805F Super I/O.
Signed-off-by: Corey Osgood corey.osgood@gmail.com Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Richard Stellingwerff remenic@gmail.com
Build Log: Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3335&device=epia-cn&...
If something broke during this checkin please be a pain in uwe's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should be backed out.
Best regards, coreboot automatic build system
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