Fish- has catched this on a Intel(r)915GM/910ML/915MS Graphics Controller with realemu:
bad mem write c0c11 bad memory access 1d17b0 4a008800 00000002 00000000 0000a002 00009000 00005108 ac007bda 00007bc0 0000 0000 0000 c000 csZoPdI 61ed c6 MOV CS:[c11], $01
question to the coreboot guys:
did you ever see the bios writing in the rom area?
i found this quote on: http://www.coreboot.org/VGA_support
"Even if your VGA BIOS uses self-modifying code you get a correct image"
i know that the rom area is usualy cached in ram but to catch mistakes i disallow writing to the rom area... fish will make full traces later this day... it could be just a screwup on my side... just curious :)
-- cinap
Am Dienstag, den 08.03.2011, 10:28 +0100 schrieb cinap_lenrek@gmx.de:
i know that the rom area is usualy cached in ram but to catch mistakes i disallow writing to the rom area... fish will make full traces later this day... it could be just a screwup on my side... just curious :)
I saw Intel VGABIOSes write to that area, and it was required for proper operation of the device later. See r6251 of coreboot where I changed YABEL's behaviour to account for that.
Regards, Patrick
O.T. - Is there i915 development going on?
On Tue, 8 Mar 2011 11:01:57 +0100, "Georgi, Patrick" Patrick.Georgi@secunet.com wrote:
Am Dienstag, den 08.03.2011, 10:28 +0100 schrieb cinap_lenrek@gmx.de:
i know that the rom area is usualy cached in ram but to catch mistakes i disallow writing to the rom area... fish will make full traces later this day... it could be just a screwup on my side... just curious :)
I saw Intel VGABIOSes write to that area, and it was required for proper operation of the device later. See r6251 of coreboot where I changed YABEL's behaviour to account for that.