On Sat, 28 Jan 2017 17:01:09 +0300 Andrey Korolyov andrey@xdel.ru wrote:
The chipset in the (QC version of the) W510 is actually exactly the same as in the X201 and T410s: Ibex Peak.
But CPUs we are looking at *are* actually different
Of course - I did not bring up chipsets ;) I am also not implying that it should work on Arrandale but I'd like to know why it doesn't and the usual "it doesnt support it" as seen around the internet (and apparently even here) does not cut it :)
- scale-down could
mean an exposure of a previously unaccounted design issue which actually prevented 32nm CPU 'upgrade' to work reliably with >8G of RAM... And AFAIR nobody ever reported to break official memory limits within an entire family, I`ll be happy to know that this is not true.
Not sure if I interpret "within an entire family" correctly, but the online specs for the 820QM are clearly wrong: https://ark.intel.com/products/43124/Intel-Core-i7-820QM-Processor-8M-Cache-...
The datasheet (320765) is a bit more correct because it leaves room for interpretation:
* Using 2-Gb device technologies, the largest memory capacity possible is 8 GB, assuming dual-channel mode with two x8, double-sided, un-buffered, non-ECC, SO-DIMM memory configuration." * Up to 32 simultaneous open pages, 16 per channel (assuming 4 Ranks of 8 Bank Devices)
The ICs on my 8 GB DIMMs are 4 Gb (Hynix H5TC4G83BFR and whatever Kingston uses on their KVR16LS11/8 DIMMs but clearly specified as 4 Gb chips).
Now... guess what the datasheet of corresponding to the i5-520m (322812) states. Exactly the same as above. I can see some other memory-related differences (e.g., regarding support for 1333 MT/s that's only available on the i7) though but nothing related to memory organization, addressing or the like (but the datasheets are very superficial regarding the memory controller as all corebooters know).
So of course the CPUs are not equal and of course the manufacturing process or small changes in the design *could* make the difference but it is all but clear from the public documentation what the true maximum is - at least for me. And I don't yet accept that it is an architectural/digital design problem.
Just to add .02c - DDR3 interposers from tek/futureplus are appearing on ebay relatively frequently and for moderate price, so if someone has will to spend some effort on this task, the analyzer coupled with interposer could provide great help, with regard to unstable behavior with a single 8G DIMM.
Definitely not worth it for this 7+ year old hardware (unless someone has a suitable scope and the knowledge already... the best scope I have access to is an Agilent MSO6104A but no idea where to even start - and no interposer obviously) but you seem to imply that the 8GB problem is an analogous one... do you think about the 16 GB problem as well?
Not sure if I interpret "within an entire family" correctly, but the online specs for the 820QM are clearly wrong
Yes, this statement is very blurry - I thought about artificial memory limitations like ones in C2000 Atom server series - there are almost identical models (C2530 and C2550 for example) which has different maximum amount of RAM. For Clarksfield web part of ARK is obviously wrong, as official third-parties like Lenovo stated 16G support, but datasheet is no better:
"One or two channels of DDR3 memory with a maximum of one SO-DIMM per channel"
which is certainly not related to widely used Clarksfield four-DIMM setup.
Definitely not worth it for this 7+ year old hardware (unless someone has a suitable scope and the knowledge already... the best scope I have access to is an Agilent MSO6104A but no idea where to even start - and no interposer obviously) but you seem to imply that the 8GB problem is an analogous one... do you think about the 16 GB problem as well?
I don`t think of this problem as of 'analogous', there`s simply not enough data to understand the problem. I have 720QM with 32G, but this laptop hardly could be called portable, perspective of having >8G of RAM in Arrandale laptops is brilliant. Regarding issue analysis, I suppose nothing much could be done with *scopes*, because data exchange violation seem not to be strict and/or large and it is impossible to catch this one in a sane time without proper bus analyzer. Speaking for Agilents, only 1690x chassis are capable to work with analyzer blades suitable for DDR3 analyzer, but they are somewhat pricey.
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Andrey Korolyov -
Stefan Tauner