答复: ????: coherent_ht_mainboard()

[YhLu]

The optimize_link make 
The link CPU0 to CPU1:  in CPU0 side(link0) is 16x800 and CPU1 side(link0)
is 16x800

but the scan_ht_chain change CPU0 side(link0) is 16x600

it must think it is connected to 8111 or something.

YH.

-----邮件原件-----
发件人: YhLu 
发送时间: 2004年3月24日 9:56
收件人: Stefan Reinauer
抄送: [e-mail]
主题: 答复: ????: coherent_ht_mainboard()

The CPU0->AMD8131->AMD8111 is right.

The link CPU0 to CPU1:  in CPU0 side(link0) is 16x600 and CPU1 side(link0)
is 16x800

All others is 8x200.

The coherent should be all 16x1000

I will try your patch and dig it out.

Regards

YH.

-----邮件原件-----
发件人: Stefan Reinauer [mailto:[e-mail]] 
发送时间: 2004年3月24日 9:37
收件人: YhLu
抄送: [e-mail]
主题: Re: ????: coherent_ht_mainboard()

* YhLu  [040324 18:39]:
> The dynamic code does not work on 4 way MB, I have found out why the s4882
> can not soft_reset.
>
> The HT-link between is not properly init properly.

Which link is this? CPU0->AMD8111?
I seemed to have no problems on quartet with 1.1.5, which is 4 way as
well.
Have you been able to track the problem down to a certain function/flaw?
> If the dynamic code can init the coherent-ht properly, We can remove
> hypertransport.c

good.

Stefan

YhLu  writes:
> The optimize_link make 
> The link CPU0 to CPU1:  in CPU0 side(link0) is 16x800 and CPU1 side(link0)
> is 16x800

I don't know if 1Ghz is actually supported between cpus.  AMD never
mentions it, at least I had not seen that it was supported when I
wrote that code.  So I erred on the side of caution and limited things
to what is documented as supported.
> but the scan_ht_chain change CPU0 side(link0) is 16x600

An 8131 does not operate reliably at over 600Mhz.  Read the errata.
The 8131 does advertise that it can go at 800Mhz though.
> it must think it is connected to 8111 or something.

I believe these cap come from ht_read_freq_cap.  And they
are explicitly set:

Here is the general version in devices/hypertransport.c.
The amdk8 versions are a little more abbreviated.

static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
{
    /* Handle bugs in valid hypertransport frequency reporting */
    unsigned freq_cap;

freq_cap = pci_read_config16(dev, pos);
    freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */

/* AMD 8131 Errata 48 */
    if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
    	(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
    	freq_cap &= ~(1 << HT_FREQ_800Mhz);
    }
    /* AMD 8151 Errata 23 */
    if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
    	(dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
    	freq_cap &= ~(1 << HT_FREQ_800Mhz);
    }
    /* AMD K8 Unsupported 1Ghz? */
    if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
    	freq_cap &= ~(1 << HT_FREQ_1000Mhz);
    }
    return freq_cap;
}

I hope this helps,

Eric