[commit] r5953 - in trunk/src/cpu/intel: slot_1 slot_2 socket_FC_PGA370 socket_PGA370

[repository service]

Author: uwe
Date: Fri Oct 15 09:47:51 2010
New Revision: 5953
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5953

Log:
Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets.

This CAR implementation hardcodes the Cache-as-RAM base address to:

0xd0000 - CacheSize

so the DCACHE_RAM_BASE is never actually used for this implementation
and these sockets.

Signed-off-by: Uwe Hermann 
Acked-by: Peter Stuge

Modified:
   trunk/src/cpu/intel/slot_1/Kconfig
   trunk/src/cpu/intel/slot_2/Kconfig
   trunk/src/cpu/intel/socket_FC_PGA370/Kconfig
   trunk/src/cpu/intel/socket_PGA370/Kconfig

Modified: trunk/src/cpu/intel/slot_1/Kconfig
==============================================================================
--- trunk/src/cpu/intel/slot_1/Kconfig	Fri Oct 15 01:40:10 2010	(r5952)
+++ trunk/src/cpu/intel/slot_1/Kconfig	Fri Oct 15 09:47:51 2010	(r5953)
@@ -21,11 +21,6 @@
    bool
    select CACHE_AS_RAM

-config DCACHE_RAM_BASE
-	hex
-	default 0xc0000
-	depends on CPU_INTEL_SLOT_1
-
 config DCACHE_RAM_SIZE
    hex
    default 0x01000

Modified: trunk/src/cpu/intel/slot_2/Kconfig
==============================================================================
--- trunk/src/cpu/intel/slot_2/Kconfig	Fri Oct 15 01:40:10 2010	(r5952)
+++ trunk/src/cpu/intel/slot_2/Kconfig	Fri Oct 15 09:47:51 2010	(r5953)
@@ -20,11 +20,6 @@
 config CPU_INTEL_SLOT_2
    bool

-config DCACHE_RAM_BASE
-	hex
-	default 0xc0000
-	depends on CPU_INTEL_SLOT_2
-
 config DCACHE_RAM_SIZE
    hex
    default 0x01000

Modified: trunk/src/cpu/intel/socket_FC_PGA370/Kconfig
==============================================================================
--- trunk/src/cpu/intel/socket_FC_PGA370/Kconfig	Fri Oct 15 01:40:10 2010	(r5952)
+++ trunk/src/cpu/intel/socket_FC_PGA370/Kconfig	Fri Oct 15 09:47:51 2010	(r5953)
@@ -26,11 +26,6 @@
    select CACHE_AS_RAM
    select TINY_BOOTBLOCK

-config DCACHE_RAM_BASE
-	hex
-	default 0xffdf8000
-	depends on CPU_INTEL_SOCKET_FC_PGA370
-
 config DCACHE_RAM_SIZE
    hex
    default 0x8000

Modified: trunk/src/cpu/intel/socket_PGA370/Kconfig
==============================================================================
--- trunk/src/cpu/intel/socket_PGA370/Kconfig	Fri Oct 15 01:40:10 2010	(r5952)
+++ trunk/src/cpu/intel/socket_PGA370/Kconfig	Fri Oct 15 09:47:51 2010	(r5953)
@@ -30,10 +30,6 @@
    bool
    default n

-config DCACHE_RAM_BASE
-	hex
-	default 0xc0000
-
 config DCACHE_RAM_SIZE
    hex
    default 0x01000