Before I can released the code, I was instructed to remove these comments by management or vendor.
Maybe we need to change enable_serial to enable_dev?
YH
-----Original Message----- From: Ronald G Minnich [mailto:rminnich@lanl.gov] Sent: Friday, October 13, 2006 2:10 PM To: Ronald G Minnich Cc: Lu, Yinghai; LinuxBIOS Subject: Re: [LinuxBIOS] sunw ultra40
ok, are the workings of this function a Deep Secret or can we add comments?
static void sio_setup(void) {
unsigned value; uint32_t dword; uint8_t byte;
pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1, 0), 0xac, 0x047f0400);
byte = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b); byte |= 0x20; pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte);
dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0); dword |= (1<<29)|(1<<0); pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);
#if 1 lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);
value = lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x77); value &= 0xbf; lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x77, value); #endif
}
Also, in this function, this happens: lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);
but in the real main this happens: lpc47b397_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init();
So the sio_setup, to me, looks bogus. Why would enable_serial use the GPIO dev and BASE?
What's up here?
ron