S2885 support.

[YhLu]

Ron,

I'm trying to port LinuxBIOS to Tyan s2885.

CPU0's Link0 is linked to 8151 ,Link1 is linked to CPU1, and Link2 is linked
to 8131. other parts is the same as s2880.

I change some hard code in raminit.c and coherent_ht.c to relecting the 8131
is linked to Link2 instead  of link0. and let link 0 to not init. ( Just
ignore it)

Everything is OK till elf boot. It seems can not access the ROM in elfboot.

Any suggestion.

PS: after add the CPU HT link definition in Config.lb, I can not see any
changes in static.c, Is it mean that you update newconfig tool? To eliminate
the Hardcode in coherent_ht and raminit.c, we need add chip.h in
northbridge/amdk8 and include it in them. Am I right?

Regards

YH

Welcome to elfboot, the open sourced starter.
January 2002, Eric Biederman.
Version 1.3

23:stream_init() - rom_stream: 0xfffe8000 - 0xfffeffff
dest=0x0000d9a0, count=0x00002000
src=0xfffe8000, bytes=0x00002000

fffe8000:----> Hang here, I try to print the ROM contect here.

[ron minnich]

can you send me your config? or better yet, your diff, which I will commit 
and then start testing.

I just this morning got the ARIMA HDAMA working with a bproc phase 1 boot, 
it was a bit of hackery needed with the kernel to tell it what kind of irq 
router it had.

I wonder how the normal bios handles the PIRQ? getpir returns one that is 
clearly bogus. I guess linux never tries to use it? But a lilo boot of 
phase 1 reveals that it does find some sort of pirq table, and does 
something I can't figure out ... oh well that's for later.

ron