It was easy to see when doing A cat /proc/interrupts and watching the offending interrupt configured Wrong. Just increment like mad.
This is the result of a cat /proc/interrupts. The interrupt increments of timer and ide0 seem fine. I compared it with a normal bios boot.
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CPU0 0: 5331065 XT-PIC timer 1: 0 XT-PIC keyboard 2: 0 XT-PIC cascade 4: 0 XT-PIC serial 5: 0 XT-PIC usb-uhci 8: 1 XT-PIC rtc 10: 0 XT-PIC usb-uhci 11: 0 XT-PIC usb-uhci 14: 22880 XT-PIC ide0 NMI: 0 ERR: 0 ================================================================
On Wed, 2004-12-15 at 19:56, Gin wrote:
It was easy to see when doing A cat /proc/interrupts and watching the offending interrupt configured Wrong. Just increment like mad.
This is the result of a cat /proc/interrupts. The interrupt increments of timer and ide0 seem fine. I compared it with a normal bios boot.
Timer and IDE are consider 'legacy' device in the IRQ routing context (i.e. they are not routed at all).
I think you have to construct the PRIQ table by hand from the schematic diagram.
Ollie
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CPU00: 5331065 XT-PIC timer 1: 0 XT-PIC keyboard 2: 0 XT-PIC cascade 4: 0 XT-PIC serial 5: 0 XT-PIC usb-uhci 8: 1 XT-PIC rtc 10: 0 XT-PIC usb-uhci 11: 0 XT-PIC usb-uhci 14: 22880 XT-PIC ide0 NMI: 0 ERR: 0 ================================================================
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