Thanks to Myles' patch adding support for include statements, refactoring Config.lb became possible.
Factor out ROM size calculation from Config.lb. Only targets with USE_FAILOVER_IMAGE support are part of this patch, the other targets will come as separate patch.
The diffstat is impressive and shows a major code reduction. src/failovercalculation.lb | 47 +++++++++++++++++++ src/mainboard/amd/serengeti_cheetah/Config.lb | 48 -------------------- src/mainboard/amd/serengeti_cheetah_fam10/Config.lb | 48 -------------------- src/mainboard/asus/a8n_e/Config.lb | 29 ------------ src/mainboard/gigabyte/ga_2761gxdk/Config.lb | 48 -------------------- src/mainboard/gigabyte/m57sli/Config.lb | 48 -------------------- src/mainboard/iwill/dk8_htx/Config.lb | 48 -------------------- src/mainboard/msi/ms7135/Config.lb | 47 ------------------- src/mainboard/msi/ms7260/Config.lb | 28 ----------- src/mainboard/nvidia/l1_2pvv/Config.lb | 48 -------------------- src/mainboard/supermicro/h8dme/Config.lb | 48 -------------------- src/mainboard/supermicro/h8dmr/Config.lb | 48 -------------------- src/mainboard/tyan/s2895/Config.lb | 48 -------------------- src/mainboard/tyan/s2912/Config.lb | 48 -------------------- src/mainboard/tyan/s2912_fam10/Config.lb | 48 -------------------- 15 files changed, 62 insertions(+), 617 deletions(-)
Abuild tested.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-Configlb_refactor/src/failovercalculation.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/failovercalculation.lb (Revision 0) +++ LinuxBIOSv2-Configlb_refactor/src/failovercalculation.lb (Revision 0) @@ -0,0 +1,47 @@ +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FAILOVER_IMAGE + default ROM_SECTION_SIZE = FAILOVER_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) +else + if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + default ROM_SECTION_OFFSET = 0 + end +end +## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + +## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) + +## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE = (64 * 1024) + +if USE_FAILOVER_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) +else + if USE_FALLBACK_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) + else + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) + end +end + Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/iwill/dk8_htx/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/iwill/dk8_htx/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/iwill/dk8_htx/Config.lb (Arbeitskopie) @@ -1,51 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/supermicro/h8dmr/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/supermicro/h8dmr/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/supermicro/h8dmr/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/supermicro/h8dme/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/supermicro/h8dme/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/supermicro/h8dme/Config.lb (Arbeitskopie) @@ -16,54 +16,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/gigabyte/m57sli/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/gigabyte/m57sli/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/gigabyte/m57sli/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/gigabyte/ga_2761gxdk/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/gigabyte/ga_2761gxdk/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/gigabyte/ga_2761gxdk/Config.lb (Arbeitskopie) @@ -21,54 +21,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/amd/serengeti_cheetah/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/amd/serengeti_cheetah/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/amd/serengeti_cheetah/Config.lb (Arbeitskopie) @@ -1,51 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb (Arbeitskopie) @@ -17,54 +17,8 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA #
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -# -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2912/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2912/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2912/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2895/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2895/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2895/Config.lb (Arbeitskopie) @@ -1,51 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2912_fam10/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2912_fam10/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/tyan/s2912_fam10/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/msi/ms7135/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/msi/ms7135/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/msi/ms7135/Config.lb (Arbeitskopie) @@ -22,53 +22,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of the coreboot bootloader. -## -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot ROM. -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can be cached to speed up coreboot -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2 (here 64 Kbyte) -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE = (64 * 1024) - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/msi/ms7260/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/msi/ms7260/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/msi/ms7260/Config.lb (Arbeitskopie) @@ -18,34 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
driver mainboard.o Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/nvidia/l1_2pvv/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/nvidia/l1_2pvv/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/nvidia/l1_2pvv/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor/src/mainboard/asus/a8n_e/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor/src/mainboard/asus/a8n_e/Config.lb (Revision 4131) +++ LinuxBIOSv2-Configlb_refactor/src/mainboard/asus/a8n_e/Config.lb (Arbeitskopie) @@ -21,33 +21,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - default ROM_SECTION_OFFSET = 0 - end -end -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -# XIP_ROM_SIZE must be a power of 2. -# XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE. -default XIP_ROM_SIZE = 64 * 1024 -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end +include /failovercalculation.lb + arch i386 end driver mainboard.o # Needed by irq_tables and mptable and acpi_tables.
impressive.
Did abuild work out ok?
For a change of this magnitude, although I am absolutely certain it works, maybe verification from two people on hardware would be a good idea.
thanks
ron
On 17.04.2009 23:46, ron minnich wrote:
impressive.
Thanks.
Did abuild work out ok?
Yes, I even wrote that in the changelog, but it may have been drowned by the diffstat.
For a change of this magnitude, although I am absolutely certain it works, maybe verification from two people on hardware would be a good idea.
Absolutely agreed. I'll wait with committing until someone has tested this. I just hope I don't have to wait for two tests on each board. One board should be sufficient, as the patches for each board are identical (if you ignore comments and whitespace).
Regards, Carl-Daniel
On Fri, Apr 17, 2009 at 3:50 PM, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net wrote:
On 17.04.2009 23:46, ron minnich wrote:
impressive.
Thanks.
Did abuild work out ok?
Yes, I even wrote that in the changelog, but it may have been drowned by the diffstat.
For a change of this magnitude, although I am absolutely certain it works, maybe verification from two people on hardware would be a good idea.
Absolutely agreed. I'll wait with committing until someone has tested this. I just hope I don't have to wait for two tests on each board. One board should be sufficient, as the patches for each board are identical (if you ignore comments and whitespace).
I would think it would be sufficient to show that the coreboot.map files are the same for the images produced. To be an effective boot test I think you'd have to boot into all three images, which will be harder for people to want to do.
Thanks, Myles
On Fri, Apr 17, 2009 at 4:14 PM, Myles Watson mylesgw@gmail.com wrote:
I would think it would be sufficient to show that the coreboot.map files are the same for the images produced. To be an effective boot test I think you'd have to boot into all three images, which will be harder for people to want to do.
That's fine, whatever you guys think constitutes a solid test, I'd just like to see *something* boot, since we've seen utterly simple changes fail in weird ways before :-)
ron
On Fri, Apr 17, 2009 at 5:16 PM, ron minnich rminnich@gmail.com wrote:
On Fri, Apr 17, 2009 at 4:14 PM, Myles Watson mylesgw@gmail.com wrote:
I would think it would be sufficient to show that the coreboot.map files are the same for the images produced. To be an effective boot test I think you'd have to boot into all three images, which will be harder for people to want to do.
That's fine, whatever you guys think constitutes a solid test, I'd just like to see *something* boot, since we've seen utterly simple changes fail in weird ways before :-)
:)
I'll be happy to test it on Monday on an s2892 fallback image.
Myles
Carl-Daniel Hailfinger wrote:
Factor out ROM size calculation from Config.lb.
Excellent!
src/failovercalculation.lb | 47 +++++++++++++++++++
Could it be called .cb instead? And maybe in src/config_includes/ rather than src/ directly?
//Peter
On 18.04.2009 18:04, Peter Stuge wrote:
Carl-Daniel Hailfinger wrote:
Factor out ROM size calculation from Config.lb.
Excellent!
Thanks!
src/failovercalculation.lb | 47 +++++++++++++++++++
Could it be called .cb instead? And maybe in src/config_includes/ rather than src/ directly?
Good idea.
I'm waiting for the abuild results on my machine without these changes to check if the current state is solid, then I'll post a new patch with the changes requested by you. As a bonus, it will convert 87 boards instead of 14.
Regards, Carl-Daniel
On 17.04.2009 23:38, Carl-Daniel Hailfinger wrote:
Thanks to Myles' patch adding support for include statements, refactoring Config.lb became possible.
Factor out ROM size calculation from Config.lb. Only targets with USE_FAILOVER_IMAGE support are part of this patch, the other targets will come as separate patch.
I have a new patch with 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. diffstat is 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Yay!
I'll post the patch once it has survived an abuild run.
Regards, Carl-Daniel
On 18.04.2009 23:56, Carl-Daniel Hailfinger wrote:
On 17.04.2009 23:38, Carl-Daniel Hailfinger wrote:
Thanks to Myles' patch adding support for include statements, refactoring Config.lb became possible.
Factor out ROM size calculation from Config.lb. Only targets with USE_FAILOVER_IMAGE support are part of this patch, the other targets will come as separate patch.
I have a new patch with 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. diffstat is 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Yay!
Abuild works for all changed boards.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb (Revision 0) +++ LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb (Revision 0) @@ -0,0 +1,38 @@ +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) +else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) + default ROM_SECTION_OFFSET = 0 +end + +## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + +## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) + +## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE = 64 * 1024 +default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE ) + +## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end + Index: LinuxBIOSv2-Configlb_refactor2/src/failovercalculation.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/failovercalculation.lb (Revision 0) +++ LinuxBIOSv2-Configlb_refactor2/src/failovercalculation.lb (Revision 0) @@ -0,0 +1,48 @@ +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FAILOVER_IMAGE + default ROM_SECTION_SIZE = FAILOVER_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) +else + if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + default ROM_SECTION_OFFSET = 0 + end +end + +## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + +## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) + +## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE = 64 * 1024 + +if USE_FAILOVER_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) +else + if USE_FALLBACK_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) + else + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) + end +end + Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8_htx/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8_htx/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8_htx/Config.lb (Arbeitskopie) @@ -1,51 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8s2/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8s2/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8s2/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8x/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8x/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/iwill/dk8x/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/axus/tc320/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/axus/tc320/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/axus/tc320/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/bcom/winnetp680/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/bcom/winnetp680/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/bcom/winnetp680/Config.lb (Arbeitskopie) @@ -19,18 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/bcom/winnet100/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/bcom/winnet100/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/bcom/winnet100/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/televideo/tc7020/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/televideo/tc7020/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/televideo/tc7020/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/broadcom/blast/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/broadcom/blast/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/broadcom/blast/Config.lb (Arbeitskopie) @@ -1,37 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/thomson/ip1000/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/thomson/ip1000/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/thomson/ip1000/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 65536 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/supermicro/h8dmr/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/supermicro/h8dmr/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/supermicro/h8dmr/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/supermicro/h8dme/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/supermicro/h8dme/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/supermicro/h8dme/Config.lb (Arbeitskopie) @@ -16,54 +16,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/a-trend/atc-6240/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/a-trend/atc-6240/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/a-trend/atc-6240/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/a-trend/atc-6220/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/a-trend/atc-6220/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/a-trend/atc-6220/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/m57sli/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/m57sli/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/m57sli/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/ga_2761gxdk/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/ga_2761gxdk/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/ga_2761gxdk/Config.lb (Arbeitskopie) @@ -21,54 +21,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/ga-6bxc/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/ga-6bxc/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/gigabyte/ga-6bxc/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/digitallogic/msm800sev/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/digitallogic/msm800sev/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/digitallogic/msm800sev/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/digitallogic/adl855pc/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/digitallogic/adl855pc/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/digitallogic/adl855pc/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/olpc/btest/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/olpc/btest/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/olpc/btest/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/olpc/rev_a/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/olpc/rev_a/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/olpc/rev_a/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/pistachio/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/pistachio/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/pistachio/Config.lb (Arbeitskopie) @@ -19,41 +19,8 @@ ## ##
+include /nofailovercalculation.lb
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end - -## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/dbm690t/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/dbm690t/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/dbm690t/Config.lb (Arbeitskopie) @@ -19,41 +19,8 @@ ## ##
+include /nofailovercalculation.lb
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end - -## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/rumba/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/rumba/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/rumba/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/serengeti_cheetah/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/serengeti_cheetah/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/serengeti_cheetah/Config.lb (Arbeitskopie) @@ -1,51 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/norwich/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/norwich/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/norwich/Config.lb (Arbeitskopie) @@ -1,40 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## - -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb (Arbeitskopie) @@ -17,54 +17,8 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA #
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -# -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/db800/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/db800/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/amd/db800/Config.lb (Arbeitskopie) @@ -1,40 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## - -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/biostar/m6tba/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/biostar/m6tba/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/biostar/m6tba/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/nec/powermate2000/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/nec/powermate2000/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/nec/powermate2000/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/rca/rm4100/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/rca/rm4100/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/rca/rm4100/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 65536 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/azza/pt-6ibd/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/azza/pt-6ibd/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/azza/pt-6ibd/Config.lb (Arbeitskopie) @@ -18,19 +18,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/iei/nova4899r/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/iei/nova4899r/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/iei/nova4899r/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/iei/pcisa-lx-800-r10/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/iei/pcisa-lx-800-r10/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/iei/pcisa-lx-800-r10/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/pcengines/alix1c/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/pcengines/alix1c/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/pcengines/alix1c/Config.lb (Arbeitskopie) @@ -18,41 +18,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/artecgroup/dbe61/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/artecgroup/dbe61/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/artecgroup/dbe61/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2912/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2912/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2912/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2850/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2850/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2850/Config.lb (Arbeitskopie) @@ -1,37 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2735/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2735/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2735/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb +default CONFIG_ROM_PAYLOAD = 1
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_PAYLOAD = 1 - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2880/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2880/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2880/Config.lb (Arbeitskopie) @@ -1,37 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2881/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2881/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2881/Config.lb (Arbeitskopie) @@ -1,37 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s1846/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s1846/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s1846/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s4880/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s4880/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s4880/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb +default CONFIG_ROM_PAYLOAD = 1
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_PAYLOAD = 1 - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2891/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2891/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2891/Config.lb (Arbeitskopie) @@ -1,41 +1,8 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end - -## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) +include /nofailovercalculation.lb default CONFIG_ROM_PAYLOAD = 1
-## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
- ## ## Build the objects we have code for in this directory. ## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2882/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2882/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2882/Config.lb (Arbeitskopie) @@ -1,37 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2892/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2892/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2892/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb +default CONFIG_ROM_PAYLOAD = 1
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_PAYLOAD = 1 - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s4882/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s4882/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s4882/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb +default CONFIG_ROM_PAYLOAD = 1
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_PAYLOAD = 1 - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2875/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2875/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2875/Config.lb (Arbeitskopie) @@ -1,37 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2885/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2885/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2885/Config.lb (Arbeitskopie) @@ -1,37 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2895/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2895/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2895/Config.lb (Arbeitskopie) @@ -1,51 +1,5 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2912_fam10/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2912_fam10/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/tyan/s2912_fam10/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asi/mb_5blgp/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asi/mb_5blgp/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asi/mb_5blgp/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asi/mb_5blmp/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asi/mb_5blmp/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asi/mb_5blmp/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/abit/be6-ii_v2_0/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/abit/be6-ii_v2_0/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/abit/be6-ii_v2_0/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/roadrunner-lx/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/roadrunner-lx/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/roadrunner-lx/Config.lb (Arbeitskopie) @@ -20,43 +20,9 @@
## Based on Config.lb from AMD's DB800 and DBM690T mainboards.
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## - -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) - - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/frontrunner/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/frontrunner/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/frontrunner/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/spacerunner-lx/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/spacerunner-lx/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/lippert/spacerunner-lx/Config.lb (Arbeitskopie) @@ -20,42 +20,9 @@
## Based on Config.lb from AMD's DB800 and DBM690T mainboards.
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## - -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) - -## ## Set all of the defaults for an x86 architecture ## arch i386 end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/vt8454c/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/vt8454c/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/vt8454c/Config.lb (Arbeitskopie) @@ -19,41 +19,9 @@ ## MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia-m/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia-m/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia-m/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia-cn/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia-cn/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia-cn/Config.lb (Arbeitskopie) @@ -19,18 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/epia/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/pc2500e/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/pc2500e/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/via/pc2500e/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/compaq/deskpro_en_sff_p600/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/compaq/deskpro_en_sff_p600/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/compaq/deskpro_en_sff_p600/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms7135/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms7135/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms7135/Config.lb (Arbeitskopie) @@ -22,53 +22,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of the coreboot bootloader. -## -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot ROM. -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can be cached to speed up coreboot -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2 (here 64 Kbyte) -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE = (64 * 1024) - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6119/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6119/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6119/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6147/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6147/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6147/Config.lb (Arbeitskopie) @@ -18,22 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) - -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) - -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) - arch i386 end driver mainboard.o
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms9282/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms9282/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms9282/Config.lb (Arbeitskopie) @@ -22,41 +22,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb +default CONFIG_ROM_PAYLOAD = 1
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_PAYLOAD = 1 - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6178/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6178/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms6178/Config.lb (Arbeitskopie) @@ -18,18 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms9185/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms9185/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms9185/Config.lb (Arbeitskopie) @@ -22,40 +22,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms7260/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms7260/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/msi/ms7260/Config.lb (Arbeitskopie) @@ -18,34 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
driver mainboard.o Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/sunw/ultra40/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/sunw/ultra40/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/sunw/ultra40/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb +default CONFIG_ROM_PAYLOAD = 1
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_PAYLOAD = 1 - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/advantech/pcm-5820/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/advantech/pcm-5820/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/advantech/pcm-5820/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/eaglelion/5bcm/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/eaglelion/5bcm/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/eaglelion/5bcm/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/newisys/khepri/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/newisys/khepri/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/newisys/khepri/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/jetway/j7f24/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/jetway/j7f24/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/jetway/j7f24/Config.lb (Arbeitskopie) @@ -19,18 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/technexion/tim8690/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/technexion/tim8690/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/technexion/tim8690/Config.lb (Arbeitskopie) @@ -19,41 +19,8 @@ ## ##
+include /nofailovercalculation.lb
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end - -## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/ibm/e326/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/ibm/e326/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/ibm/e326/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/ibm/e325/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/ibm/e325/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/ibm/e325/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/nvidia/l1_2pvv/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/nvidia/l1_2pvv/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/nvidia/l1_2pvv/Config.lb (Arbeitskopie) @@ -19,54 +19,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) - default ROM_SECTION_OFFSET = 0 - end -end +include /failovercalculation.lb
-## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 - -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end - arch i386 end
## Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/mew-am/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/mew-am/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/mew-am/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-d/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-d/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-d/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_MP_TABLE object mptable.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-f/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-f/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-f/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/a8v-e_se/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/a8v-e_se/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/a8v-e_se/Config.lb (Arbeitskopie) @@ -20,21 +20,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb +default CONFIG_ROM_PAYLOAD = 1
-default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_PAYLOAD = 1 -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 65536 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) - arch i386 end
driver mainboard.o Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p3b-f/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p3b-f/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p3b-f/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-ds/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-ds/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/p2b-ds/Config.lb (Arbeitskopie) @@ -18,19 +18,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) -else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - default ROM_SECTION_OFFSET = 0 -end -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE - + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -default XIP_ROM_SIZE = 64 * 1024 -default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +include /nofailovercalculation.lb + arch i386 end driver mainboard.o if HAVE_MP_TABLE object mptable.o end Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/mew-vm/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/mew-vm/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/mew-vm/Config.lb (Arbeitskopie) @@ -1,38 +1,6 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) - default ROM_SECTION_OFFSET = 0 -end +include /nofailovercalculation.lb
## -## Compute the start location and size size of -## The coreboot bootloader. -## -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## ## Set all of the defaults for an x86 architecture ##
Index: LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/a8n_e/Config.lb =================================================================== --- LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/a8n_e/Config.lb (Revision 4136) +++ LinuxBIOSv2-Configlb_refactor2/src/mainboard/asus/a8n_e/Config.lb (Arbeitskopie) @@ -21,33 +21,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
-if USE_FAILOVER_IMAGE - default ROM_SECTION_SIZE = FAILOVER_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FAILOVER_SIZE) -else - if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - else - default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE) - default ROM_SECTION_OFFSET = 0 - end -end -default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) -# XIP_ROM_SIZE must be a power of 2. -# XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE. -default XIP_ROM_SIZE = 64 * 1024 -if USE_FAILOVER_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) -else - if USE_FALLBACK_IMAGE - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) - else - default XIP_ROM_BASE = (_ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) - end -end +include /failovercalculation.lb + arch i386 end driver mainboard.o # Needed by irq_tables and mptable and acpi_tables.
Carl-Daniel Hailfinger wrote:
I have a new patch with 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. diffstat is 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Yay!
Abuild works for all changed boards.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb
src/config_includes/ please?
Acked-by: Peter Stuge peter@stuge.se
On 19.04.2009 18:40 Uhr, Peter Stuge wrote:
Carl-Daniel Hailfinger wrote:
I have a new patch with 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. diffstat is 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Yay!
Abuild works for all changed boards.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb
src/config_includes/ please?
Please no new directory.
src/config is the right one for exactly that purpose.
Acked-by: Peter Stuge peter@stuge.se
Stefan Reinauer wrote:
Index: LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb
src/config_includes/ please?
Please no new directory.
src/config is the right one for exactly that purpose.
Yes, since there is a directory already that's much better!
But, and I forgot to ask this for this patch, please name it .cb though.
These improvements are really wonderful!
//Peter
On 19.04.2009 18:54, Peter Stuge wrote:
Stefan Reinauer wrote:
Index: LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb
src/config_includes/ please?
Please no new directory.
src/config is the right one for exactly that purpose.
Yes, since there is a directory already that's much better!
Will do.
But, and I forgot to ask this for this patch, please name it .cb though.
Can we please keep the naming of these files consistent? Right now, I can do a find -name "*.lb" and get all config and include files. If I rename the include files only, that will no longer work.
If we really want to rename all .lb to .cb, we should do that in one separate commit. It will break every tree out there, so we'd better think about this one. And given that Ron wants to convert most of the stuff to real makefiles anyway, I am not sure we want to break vendor/developer trees twice (once for .lb->.bc and once for real makefiles).
These improvements are really wonderful!
Thanks!
I'll hold off committing until I get an answer on the renaming stuff.
Regards, Carl-Daniel
On Mon, Apr 20, 2009 at 09:53:10AM +0200, Carl-Daniel Hailfinger wrote:
If we really want to rename all .lb to .cb, we should do that in one separate commit.
Agreed. Please commit this as is, the renaming can be an extra step.
Acked-by: Uwe Hermann uwe@hermann-uwe.de
Uwe.
Carl-Daniel Hailfinger wrote:
Can we please keep the naming of these files consistent?
Maybe think of it as migration. I think Kconfig will take a while.
Right now, I can do a find -name "*.lb" and get all config and include files. If I rename the include files only, that will no longer work.
Right, you'll have to use
find -name '*.[lc]b'
instead.
And given that Ron wants to convert most of the stuff to real makefiles anyway,
I want that too, but I think we will be doing many other improvements before that one.
I am not sure we want to break vendor/developer trees twice (once for .lb->.bc and once for real makefiles).
It's a good point to not break stuff. I think it's OK to add new things in a new way though (as long as there is a point of course).
//Peter
On 20.04.2009 13:41, Peter Stuge wrote:
Carl-Daniel Hailfinger wrote:
Can we please keep the naming of these files consistent?
Maybe think of it as migration. I think Kconfig will take a while.
And I'd like to separate migration and include file refactoring into two separate commits.
Right now, I can do a find -name "*.lb" and get all config and include files. If I rename the include files only, that will no longer work.
Right, you'll have to use
find -name '*.[lc]b'
instead.
Correct. It's doable, but neither obvious nor documented. Some documentation for this would be really nice. That's why I want to postpone that part into another commit.
And given that Ron wants to convert most of the stuff to real makefiles anyway,
I want that too, but I think we will be doing many other improvements before that one.
OK. So there will probably be some intermediary stage.
I am not sure we want to break vendor/developer trees twice (once for .lb->.bc and once for real makefiles).
It's a good point to not break stuff. I think it's OK to add new things in a new way though (as long as there is a point of course).
After this patch, the tree will be mostly converted. ROM size calculation for a few boards is still not factored out because it is either unique or non-obvious. We need at least one other conversion patch for the remaining boards and I'd appreciate help with that.
Can I use your Ack for an intermediary commit which has the include files in src/config/, but with the old .lb name until someone writes up a doc?
Regards, Carl-Daniel
Carl-Daniel Hailfinger wrote:
Maybe think of it as migration. I think Kconfig will take a while.
And I'd like to separate migration and include file refactoring into two separate commits.
Okey.
I want that too, but I think we will be doing many other improvements before that one.
OK. So there will probably be some intermediary stage.
Yes, I think so.
After this patch, the tree will be mostly converted. ROM size calculation for a few boards is still not factored out because it is either unique or non-obvious. We need at least one other conversion patch for the remaining boards and I'd appreciate help with that.
Which are some of the boards? Well, let's commit this first. :)
Can I use your Ack for an intermediary commit which has the include files in src/config/, but with the old .lb name
Yep, go for it.
//Peter
let's not rename just yet. I think we digest these include changes, wait a bit to make sure nobody has had trouble with it, then we can revisit the .cb issue. Since our spring goal is "Kconfig or death", the .cb issue might not matter in a bit.
ron
On Sun, Apr 19, 2009 at 9:26 AM, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net wrote:
On 18.04.2009 23:56, Carl-Daniel Hailfinger wrote:
On 17.04.2009 23:38, Carl-Daniel Hailfinger wrote:
Thanks to Myles' patch adding support for include statements, refactoring Config.lb became possible.
Factor out ROM size calculation from Config.lb. Only targets with USE_FAILOVER_IMAGE support are part of this patch, the other targets will come as separate patch.
I have a new patch with 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. diffstat is 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Yay!
Abuild works for all changed boards.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb
--- LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb (Revision 0) +++ LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb (Revision 0) @@ -0,0 +1,38 @@ +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FALLBACK_IMAGE
- default ROM_SECTION_SIZE = FALLBACK_SIZE
- default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
+else
- default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
- default ROM_SECTION_OFFSET = 0
+end
+## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
+## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
+## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE = 64 * 1024 +default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE )
+## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end
INSTANCE 0 INCLUDE config/nofailovercalculation.lb Trying to find one of NUM, HEX_PREFIX, ID, "\(", "!" on line 34:
^
List of nearby tokens: (@945) NUM = '1024' (@950) DEFAULT = 'default' (@958) ID = 'XIP_ROM_BASE' (@971) EQ = '=' (@973) ID = '_ROMBASE' (@982) "-" = '-' (@984) ID = 'XIP_ROM_SIZE' (@997) "[+]" = '+' (@999) ID = 'ROM_IMAGE_SIZE' (@1014) "||" = '' ===> ERROR: Could not parse file tyan/s2892/Config.lb:0
I don't know why the parser is matching blank space with "||"
We could also remove that rule in config.g to get around it.
I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same.
Acked-by: Myles Watson mylesgw@gmail.com
Thanks, Myles
On 21.04.2009 00:56, Myles Watson wrote:
On Sun, Apr 19, 2009 at 9:26 AM, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net wrote:
On 18.04.2009 23:56, Carl-Daniel Hailfinger wrote:
On 17.04.2009 23:38, Carl-Daniel Hailfinger wrote:
Thanks to Myles' patch adding support for include statements, refactoring Config.lb became possible.
Factor out ROM size calculation from Config.lb. Only targets with USE_FAILOVER_IMAGE support are part of this patch, the other targets will come as separate patch.
I have a new patch with 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. diffstat is 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Yay!
Abuild works for all changed boards.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb
--- LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb (Revision 0) +++ LinuxBIOSv2-Configlb_refactor2/src/nofailovercalculation.lb (Revision 0) @@ -0,0 +1,38 @@ +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FALLBACK_IMAGE
default ROM_SECTION_SIZE = FALLBACK_SIZEdefault ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )+else
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )default ROM_SECTION_OFFSET = 0+end
+## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
+## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
+## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE = 64 * 1024 +default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE )
+## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end
INSTANCE 0 INCLUDE config/nofailovercalculation.lb Trying to find one of NUM, HEX_PREFIX, ID, "\(", "!" on line 34:
^
List of nearby tokens: (@945) NUM = '1024' (@950) DEFAULT = 'default' (@958) ID = 'XIP_ROM_BASE' (@971) EQ = '=' (@973) ID = '_ROMBASE' (@982) "-" = '-' (@984) ID = 'XIP_ROM_SIZE' (@997) "[+]" = '+' (@999) ID = 'ROM_IMAGE_SIZE' (@1014) "||" = '' ===> ERROR: Could not parse file tyan/s2892/Config.lb:0
I don't know why the parser is matching blank space with "||"
I had exactly his bug, but the "if USE_FALLBACK_IMAGE end" worked around it. Took me hours to figure out that workaround. I was unable to fix the parser.
We could also remove that rule in config.g to get around it.
I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same.
Acked-by: Myles Watson mylesgw@gmail.com
Yay, thanks!
I'll commit ASAP.
Regards, Carl-Daniel
so send me a Config.lb fragment that tickles the bug and I'll look
ron
On 21.04.2009 01:32, ron minnich wrote:
so send me a Config.lb fragment that tickles the bug and I'll look
The big problem is that the trigger mechanism is totally unclear. The parser will stumble on fragments which are totally sane.
Basically, if you move some code from a Config.lb to an include file and the code is bit-for-bit identical, the parser still may barf at the end of the include file with the error message Myles posted. Insert the content of the include file where the include statement is, and everything works. I somehow have the feeling that the parser dislikes the end of include files. It often tries to find something there and fails.
And as Myles demonstrated, even if it works for me in abuild, it may still fail for him.
Regards, Carl-Daniel
the issue is that include files need an end statement. Long story. My fault.
ron
On Mon, Apr 20, 2009 at 7:50 PM, ron minnich rminnich@gmail.com wrote:
the issue is that include files need an end statement. Long story. My fault.
that's not quite it either, sorry, it's been a long day.
Anyways, whatever it is, it is probably my fault. So, given a chance, I'll try to fix it.
Sorry
ron
-----Original Message----- From: ron minnich [mailto:rminnich@gmail.com] On Mon, Apr 20, 2009 at 7:50 PM, ron minnich rminnich@gmail.com wrote:
the issue is that include files need an end statement. Long story. My
fault.
that's not quite it either, sorry, it's been a long day.
I think that this small patch fixes it. It seems that | is special to the tokenizer and needs to be [|], so "||" => "[|][|]". There are no occurrences of || that I can find in Config.lb files, which probably means that this bug has stopped people from using it. I made up a test case, but nothing real. I'd love for someone to think of a place they'd like to use || in a Config.lb file and try it out.
Signed-off-by: Myles Watson mylesgw@gmail.com
+## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end
This snippet will also disappear from config/nofailovercalculation.lb with an ack.
Thanks, Myles
On 21.04.2009 05:37, Myles Watson wrote:
-----Original Message----- From: ron minnich [mailto:rminnich@gmail.com] On Mon, Apr 20, 2009 at 7:50 PM, ron minnich rminnich@gmail.com wrote:
the issue is that include files need an end statement. Long story. My
fault.
that's not quite it either, sorry, it's been a long day.
I think that this small patch fixes it. It seems that | is special to the tokenizer and needs to be [|], so "||" => "[|][|]". There are no occurrences of || that I can find in Config.lb files, which probably means that this bug has stopped people from using it. I made up a test case, but nothing real. I'd love for someone to think of a place they'd like to use || in a Config.lb file and try it out.
Signed-off-by: Myles Watson mylesgw@gmail.com
I can't verify the correctness of this, but it fixes a real issue. Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
+## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end
This snippet will also disappear from config/nofailovercalculation.lb with an ack.
Could you tackle config/nofailovercalculation128.lb as well? It has the same workaround. Thanks.
Regards, Carl-Daniel
On Wed, Apr 22, 2009 at 4:13 PM, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net wrote:
On 21.04.2009 05:37, Myles Watson wrote:
-----Original Message----- From: ron minnich [mailto:rminnich@gmail.com] On Mon, Apr 20, 2009 at 7:50 PM, ron minnich rminnich@gmail.com wrote:
the issue is that include files need an end statement. Long story. My
fault.
that's not quite it either, sorry, it's been a long day.
I think that this small patch fixes it. It seems that | is special to the tokenizer and needs to be [|], so "||" => "[|][|]". There are no occurrences of || that I can find in Config.lb files, which probably means that this bug has stopped people from using it. I made up a test case, but nothing real. I'd love for someone to think of a place they'd like to use || in a Config.lb file and try it out.
Signed-off-by: Myles Watson mylesgw@gmail.com
I can't verify the correctness of this, but it fixes a real issue. Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
+## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end
This snippet will also disappear from config/nofailovercalculation.lb with an ack.
Could you tackle config/nofailovercalculation128.lb as well? It has the same workaround. Thanks.
Sure. Rev 4187.
Thanks, Myles
-----Original Message----- From: ron minnich [mailto:rminnich@gmail.com] Sent: Monday, April 20, 2009 5:33 PM To: Carl-Daniel Hailfinger Cc: Myles Watson; Coreboot Subject: Re: [coreboot] [PATCH] Factor out ROM size calculation from Config.lb
so send me a Config.lb fragment that tickles the bug and I'll look
Just delete the
if USE_FALLBACK_IMAGE end
from the end of the include file. It'll break.
+## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end
INSTANCE 0 INCLUDE config/nofailovercalculation.lb Trying to find one of NUM, HEX_PREFIX, ID, "\(", "!" on line 34:
^
List of nearby tokens: (@945) NUM = '1024' (@950) DEFAULT = 'default' (@958) ID = 'XIP_ROM_BASE' (@971) EQ = '=' (@973) ID = '_ROMBASE' (@982) "-" = '-' (@984) ID = 'XIP_ROM_SIZE' (@997) "[+]" = '+' (@999) ID = 'ROM_IMAGE_SIZE' (@1014) "||" = '' ===> ERROR: Could not parse file tyan/s2892/Config.lb:0
I don't know why the parser is matching blank space with "||"
The reason I included this snippet is because I removed it so I could see what the parser bug was. It looks like it expects the expression to continue if it doesn't find an if. For some reason it matches the empty string with "||" and looks for the next piece of the expression. I took out the || rule and that also solves the problem. "&&" didn't match the empty string.
Thanks, Myles
On 21.04.2009 00:56, Myles Watson wrote:
On Sun, Apr 19, 2009 at 9:26 AM, Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net wrote:
On 18.04.2009 23:56, Carl-Daniel Hailfinger wrote:
On 17.04.2009 23:38, Carl-Daniel Hailfinger wrote:
Thanks to Myles' patch adding support for include statements, refactoring Config.lb became possible.
Factor out ROM size calculation from Config.lb. Only targets with USE_FAILOVER_IMAGE support are part of this patch, the other targets will come as separate patch.
I have a new patch with 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. diffstat is 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Yay!
Abuild works for all changed boards.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same.
Acked-by: Myles Watson mylesgw@gmail.com
Thanks to everyone for reviewing and to Myles for testing! Committed in r4147.
Regards, Carl-Daniel
-
Carl-Daniel Hailfinger -
Myles Watson -
Peter Stuge -
ron minnich -
Stefan Reinauer -
Uwe Hermann