Hi everybody, I'm working on getting coreboot going on my 'thintune'. It's a thin client PC with a custom motherboard based on the via vt8601 North and vt82c686b south. I'm using coreboot v2 since v3 was stated to be unstable (Is this the best choice?).
I started out by porting some of the code for the 82c686 from the v1 project and using the code for the vt8235 to structure it in the v2 way. I've no clue if I've done it right or not, but there doesn't seem to be very much documentation on that (feel free to point out if there is...).
I'm currently trying to get it built, but just found out that SMBus seems to be needed for the RAM stuff, so I'm porting it over from the 8235.
Any tips, tricks and remarks are welcome. I'll give word when it compiles and I've done a test boot.
regards, Daniel Lindenaar
Hi everybody, Too bad, first test boot didn't work... at all... I expected the early serial stuff to work at least (as this was already in svn, but...)
I'm using a very simple null-modem cable with only rx,tx and ground wired. Is this enough or does coreboot require a more complete cable?
Also, do I need some special settings to enable the debugging output?
I really feel like the newbie now, asking these basic questions :), but I also would really like to get this thing working on this motherboard...
regards Daniel
Quoting "Daniel Lindenaar" daniel-coreboot@lindenaar.eu:
Hi everybody, I'm working on getting coreboot going on my 'thintune'. It's a thin client PC with a custom motherboard based on the via vt8601 North and vt82c686b south. I'm using coreboot v2 since v3 was stated to be unstable (Is this the best choice?).
I started out by porting some of the code for the 82c686 from the v1 project and using the code for the vt8235 to structure it in the v2 way. I've no clue if I've done it right or not, but there doesn't seem to be very much documentation on that (feel free to point out if there is...).
I'm currently trying to get it built, but just found out that SMBus seems to be needed for the RAM stuff, so I'm porting it over from the 8235.
Any tips, tricks and remarks are welcome. I'll give word when it compiles and I've done a test boot.
regards, Daniel Lindenaar
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
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On Thu, Sep 4, 2008 at 11:55 AM, Daniel Lindenaar daniel@lindenaar.eu wrote:
Hi everybody, Too bad, first test boot didn't work... at all... I expected the early serial stuff to work at least (as this was already in svn, but...)
I'm using a very simple null-modem cable with only rx,tx and ground wired. Is this enough or does coreboot require a more complete cable?
Also, do I need some special settings to enable the debugging output?
I really feel like the newbie now, asking these basic questions :), but I also would really like to get this thing working on this motherboard...
regards Daniel
Nope, that cable should be plenty, as long as it's good. A couple things to check, when I wrote vt82c686's early serial stuff, I may have configured it to use the second serial output, because I think that's all my board had. I can't remember though, so check the datasheet (I can't right now). Also, check that your debugging setup actually works, boot linux with the stock bios and "console=tty0 console=ttyS0,115200" passed to linux. If you don't get a linux boot log, something's wrong with your serial setup. If everything checks out, send me a compressed copy of your tree, and I'll try to find the problem.
-Corey
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 11:55 AM, Daniel Lindenaar daniel@lindenaar.eu wrote:
Hi everybody, Too bad, first test boot didn't work... at all... I expected the early serial stuff to work at least (as this was already in svn, but...)
I'm using a very simple null-modem cable with only rx,tx and ground wired. Is this enough or does coreboot require a more complete cable?
Also, do I need some special settings to enable the debugging output?
I really feel like the newbie now, asking these basic questions :), but I also would really like to get this thing working on this motherboard...
regards Daniel
Nope, that cable should be plenty, as long as it's good. A couple things to check, when I wrote vt82c686's early serial stuff, I may have configured it to use the second serial output, because I think that's all my board had. I can't remember though, so check the datasheet (I can't right now). Also, check that your debugging setup actually works, boot linux with the stock bios and "console=tty0 console=ttyS0,115200" passed to linux. If you don't get a linux boot log, something's wrong with your serial setup. If everything checks out, send me a compressed copy of your tree, and I'll try to find the problem.
-Corey
Great! the com port was indeed nr2. That works better... well the minimal version of better actually :/
coreboot-2.0.0.0Fallback Wed Sep 3 22:07:38 UTC 2008 starting...
This is all I'm seeing... I guess I should check loglevel and such.
Corey, If you're willing to help I'll be glad to send you my tree, but I don't want to impose too much; but if you're willing ;)
regards, Daniel
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 11:55 AM, Daniel Lindenaar daniel@lindenaar.eu wrote:
Hi everybody, Too bad, first test boot didn't work... at all... I expected the early serial stuff to work at least (as this was already in svn, but...)
I'm using a very simple null-modem cable with only rx,tx and ground wired. Is this enough or does coreboot require a more complete cable?
Also, do I need some special settings to enable the debugging output?
I really feel like the newbie now, asking these basic questions :), but I also would really like to get this thing working on this motherboard...
regards Daniel
Nope, that cable should be plenty, as long as it's good. A couple things to check, when I wrote vt82c686's early serial stuff, I may have configured it to use the second serial output, because I think that's all my board had. I can't remember though, so check the datasheet (I can't right now). Also, check that your debugging setup actually works, boot linux with the stock bios and "console=tty0 console=ttyS0,115200" passed to linux. If you don't get a linux boot log, something's wrong with your serial setup. If everything checks out, send me a compressed copy of your tree, and I'll try to find the problem.
-Corey
Great! the com port was indeed nr2. That works better... well the minimal version of better actually :/
coreboot-2.0.0.0Fallback Wed Sep 3 22:07:38 UTC 2008 starting...
This is all I'm seeing... I guess I should check loglevel and such.
Corey, If you're willing to help I'll be glad to send you my tree, but I don't want to impose too much; but if you're willing ;)
regards, Daniel
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
On Thu, Sep 4, 2008 at 2:30 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 11:55 AM, Daniel Lindenaar daniel@lindenaar.eu wrote:
Hi everybody, Too bad, first test boot didn't work... at all... I expected the early serial stuff to work at least (as this was already in svn, but...)
I'm using a very simple null-modem cable with only rx,tx and ground wired. Is this enough or does coreboot require a more complete cable?
Also, do I need some special settings to enable the debugging output?
I really feel like the newbie now, asking these basic questions :), but I also would really like to get this thing working on this motherboard...
regards Daniel
Nope, that cable should be plenty, as long as it's good. A couple things to check, when I wrote vt82c686's early serial stuff, I may have configured it to use the second serial output, because I think that's all my board had. I can't remember though, so check the datasheet (I can't right now). Also, check that your debugging setup actually works, boot linux with the stock bios and "console=tty0 console=ttyS0,115200" passed to linux. If you don't get a linux boot log, something's wrong with your serial setup. If everything checks out, send me a compressed copy of your tree, and I'll try to find the problem.
-Corey
Great! the com port was indeed nr2. That works better... well the minimal version of better actually :/
coreboot-2.0.0.0Fallback Wed Sep 3 22:07:38 UTC 2008 starting...
This is all I'm seeing... I guess I should check loglevel and such.
Corey, If you're willing to help I'll be glad to send you my tree, but I don't want to impose too much; but if you're willing ;)
Well, serial's working now ;) Looks like you're dying either somewhere in SMBus or ram init. I'd start with inserting LOTS of debug messages, and turning the log level up to 9. The more messages you have, the easier it is to pinpoint where it dies. I can try to help, but I'm not sure how much I can ;)
-Corey
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 2:30 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 11:55 AM, Daniel Lindenaar daniel@lindenaar.eu wrote:
Hi everybody, Too bad, first test boot didn't work... at all... I expected the early serial stuff to work at least (as this was already in svn, but...)
I'm using a very simple null-modem cable with only rx,tx and ground wired. Is this enough or does coreboot require a more complete cable?
Also, do I need some special settings to enable the debugging output?
I really feel like the newbie now, asking these basic questions :), but I also would really like to get this thing working on this motherboard...
regards Daniel
Nope, that cable should be plenty, as long as it's good. A couple things to check, when I wrote vt82c686's early serial stuff, I may have configured it to use the second serial output, because I think that's all my board had. I can't remember though, so check the datasheet (I can't right now). Also, check that your debugging setup actually works, boot linux with the stock bios and "console=tty0 console=ttyS0,115200" passed to linux. If you don't get a linux boot log, something's wrong with your serial setup. If everything checks out, send me a compressed copy of your tree, and I'll try to find the problem.
-Corey
Great! the com port was indeed nr2. That works better... well the minimal version of better actually :/
coreboot-2.0.0.0Fallback Wed Sep 3 22:07:38 UTC 2008 starting...
This is all I'm seeing... I guess I should check loglevel and such.
Corey, If you're willing to help I'll be glad to send you my tree, but I don't want to impose too much; but if you're willing ;)
Well, serial's working now ;) Looks like you're dying either somewhere in SMBus or ram init. I'd start with inserting LOTS of debug messages, and turning the log level up to 9. The more messages you have, the easier it is to pinpoint where it dies. I can try to help, but I'm not sure how much I can ;)
-Corey
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot... probably something needs to be set that doesn't get set by default on cold reboot.
Anyway, it's the SMBus controller where things go wrong; the log says:
SMBUS controller not found
as the last item. At least some progress is made. Besides the logging not working on cold boot, which it should at some point, I've now got something that works well enough to start proper debugging.
regards, Daniel
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
in other words, you boot the factory bios, boot linux, swap flash part, reboot, and there's no smbus controller? This is probably an I2C mux then.
ron
On Thu, Sep 4, 2008 at 2:26 PM, ron minnich rminnich@gmail.com wrote:
in other words, you boot the factory bios, boot linux, swap flash part, reboot, and there's no smbus controller? This is probably an I2C mux then.
now why'd I say that? This is *possibly* an i2c mux but more likely the smbus device has some weird enable bit. What's the pci discovery stuff in coreboot show?
ron
Quoting "ron minnich" rminnich@gmail.com:
On Thu, Sep 4, 2008 at 2:26 PM, ron minnich rminnich@gmail.com wrote:
in other words, you boot the factory bios, boot linux, swap flash part, reboot, and there's no smbus controller? This is probably an I2C mux then.
now why'd I say that? This is *possibly* an i2c mux but more likely the smbus device has some weird enable bit. What's the pci discovery stuff in coreboot show?
Hmm, I don't get any logging from pci discovery stuff; anything special needed for that?
regards Daniel
ron
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Daniel Lindenaar wrote:
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot...
This sounds an awful lot like superio init, or some GPIO issue.
Are you initializing your superio correctly? Does your board use the 82c686 superio? Or does it have an extra superio? (Check with superiotool)
probably something needs to be set that doesn't get set by default on cold reboot.
Anyway, it's the SMBus controller where things go wrong; the log says:
SMBUS controller not found
What device are you looking for at that point?
On the vt82c686 the smbus device has vendor 0x1106 and device 0x3057
Quoting "Stefan Reinauer" stepan@coresystems.de:
Daniel Lindenaar wrote:
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot...
This sounds an awful lot like superio init, or some GPIO issue.
Are you initializing your superio correctly? Does your board use the 82c686 superio? Or does it have an extra superio? (Check with superiotool)
probably something needs to be set that doesn't get set by default on cold reboot.
Anyway, it's the SMBus controller where things go wrong; the log says:
SMBUS controller not found
What device are you looking for at that point?
On the vt82c686 the smbus device has vendor 0x1106 and device 0x3057
hmm i'll have to look into the code (at work, now). In linux the device is shown as vt82xxx ACPI and power something.. and that device includes the SMBus controller at some IO offset. I'm pretty sure I'm using the right PCI device, bus maybe the IO offset is wrong.
It's using the 82c686 superio and superiotool doesn't find any other, so I'm pretty sure it's the integrated one. I'll need to check the SMBus code path's and/or initialisation code and see if there's something wrong.
regards, Daniel
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Daniel Lindenaar wrote:
Quoting "Stefan Reinauer" stepan@coresystems.de:
Daniel Lindenaar wrote:
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot...
This sounds an awful lot like superio init, or some GPIO issue.
Are you initializing your superio correctly? Does your board use the 82c686 superio? Or does it have an extra superio? (Check with superiotool)
probably something needs to be set that doesn't get set by default on cold reboot.
Anyway, it's the SMBus controller where things go wrong; the log says:
SMBUS controller not found
What device are you looking for at that point?
On the vt82c686 the smbus device has vendor 0x1106 and device 0x3057
hmm i'll have to look into the code (at work, now). In linux the device is shown as vt82xxx ACPI and power something.. and that device includes the SMBus controller at some IO offset. I'm pretty sure I'm using the right PCI device, bus maybe the IO offset is wrong.
The message "SMBUS controller not found" implies that the PCI device is not there. It doesn't even start looking for the offset at that point.
Hi Guys, Some progress... I now get the following log:
coreboot-2.0.0.0Fallback Fri Sep 5 22:02:42 UTC 2008 starting... test spew test err passed bist failure entering enable_mainboard_devices pci_loc_dev 1106:0686 .... exiting enable_motherboard_devsvt8601 init starting 00000000 is the north1106 0601 0120smbus_error: 04 Device Error smbus_error: 04 Device Error smbus_error: 04 Device Error 84 is the computed timingNOP PRECHARGE DUMMY READS CBR MRS NORMAL set ref. rate enable multi-page open Slot 00smbus_error: 04 Device Error is empty Slot 01smbus_error: 04 Device Error is empty Slot 02smbus_error: 04 Device Error is empty Slot 03smbus_error: 04 Device Error is empty vt8601 done Copying coreboot to RAM. Jumping to coreboot.
Seems the SMBus is not yet working fully. Any suggestions?
btw. there was the wrong PCI device set up for SMBus functionality :/ sloppy...
Another question: Is it normal that the booted coreboot is the .0Fallback one?
regards, Daniel
Now it's time to look for an smbus mux ...
ron
Sounds great...but... how do I go about this???
regards, Daniel
ron minnich wrote:
Now it's time to look for an smbus mux ...
ron
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
ron minnich wrote:
Now it's time to look for an smbus mux ...
ron
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
OK, I've used the linux tools for i2c:
0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- 2d -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- -- 70: -- -- -- -- -- -- -- --
It seems 0x2d is some sensor (however, lmsensors doesn't know it) , 0x50 is a memory slot and 0x69 is some clock chip...
Does this tell you anything?
regards, Daniel
On Mon, Sep 8, 2008 at 1:36 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
ron minnich wrote:
Now it's time to look for an smbus mux ...
ron
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
OK, I've used the linux tools for i2c:
0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- 2d -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- -- 70: -- -- -- -- -- -- -- --
It seems 0x2d is some sensor (however, lmsensors doesn't know it) , 0x50 is a memory slot and 0x69 is some clock chip...
can you do this exact same kind of dump in coreboot and see what you get?
ron
ron minnich wrote:
On Mon, Sep 8, 2008 at 1:36 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
ron minnich wrote:
Now it's time to look for an smbus mux ...
ron
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
OK, I've used the linux tools for i2c:
0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- 2d -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- -- 70: -- -- -- -- -- -- -- --
It seems 0x2d is some sensor (however, lmsensors doesn't know it) , 0x50 is a memory slot and 0x69 is some clock chip...
can you do this exact same kind of dump in coreboot and see what you get?
ron
OK, I'll give that a try... However, SMBus write is used for this detection routine esp. at 0x69 and 0x2d, and that function is not implemented, it seems. I'll port the i2cdetect code to coreboot and see what it says...
regards, Daniel
On Mon, Sep 8, 2008 at 2:09 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
OK, I'll give that a try... However, SMBus write is used for this detection routine esp. at 0x69 and 0x2d, and that function is not implemented, it seems. I'll port the i2cdetect code to coreboot and see what it says...
actually, if you can just do a presence/absence for each test for a start, that is easy and needs no new code.
ron
ron minnich wrote:
On Mon, Sep 8, 2008 at 2:09 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
OK, I'll give that a try... However, SMBus write is used for this detection routine esp. at 0x69 and 0x2d, and that function is not implemented, it seems. I'll port the i2cdetect code to coreboot and see what it says...
actually, if you can just do a presence/absence for each test for a start, that is easy and needs no new code.
ron
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Could you give me a hint on how to do this? I didn't see any function to do this, but I could have missed it :)
regards, Daniel
On Tue, Sep 9, 2008 at 9:54 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Could you give me a hint on how to do this? I didn't see any function to do this, but I could have missed it :)
You're going to have to write it, but it should not be too hard given the support in there. Try to read at offset 0 for all 128 devices.
ron
ron minnich wrote:
On Tue, Sep 9, 2008 at 9:54 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Could you give me a hint on how to do this? I didn't see any function to do this, but I could have missed it :)
You're going to have to write it, but it should not be too hard given the support in there. Try to read at offset 0 for all 128 devices.
ron
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Ah I see, it's pretty much how the i2cdetect app works. I just did that and I got 128 times: "smbus_error: 04, Device Error", which is the same as I got from the spd functions :/
more suggestions?
regards, Daniel
On Tue, Sep 9, 2008 at 11:33 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Ah I see, it's pretty much how the i2cdetect app works. I just did that and I got 128 times: "smbus_error: 04, Device Error", which is the same as I got from the spd functions :/
interesting. Can you remind me of how i2cdetect works? Directly diddles registers, knows how to do it?
ron
ron minnich wrote:
On Tue, Sep 9, 2008 at 11:33 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Ah I see, it's pretty much how the i2cdetect app works. I just did that and I got 128 times: "smbus_error: 04, Device Error", which is the same as I got from the spd functions :/
Cr*p it seems I've overlooked that there were only 126 errors and actually 0x5a and 0x5b did reply... Does this help?
interesting. Can you remind me of how i2cdetect works? Directly diddles registers, knows how to do it?
Well it uses the i2c-dev and i2c-* modules in the linux kernel which do know how to diddle registers by calling i2c_smbus_read_byte(...) on most addresses and i2c_smbus_write_quick(...) on others, depending on expected behavior of the slaves.
regards Daniel
On Tue, Sep 9, 2008 at 11:42 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
ron minnich wrote:
On Tue, Sep 9, 2008 at 11:33 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Ah I see, it's pretty much how the i2cdetect app works. I just did that and I got 128 times: "smbus_error: 04, Device Error", which is the same as I got from the spd functions :/
Cr*p it seems I've overlooked that there were only 126 errors and actually 0x5a and 0x5b did reply... Does this help?
it helps quite a bit. It means there is almost certainly more than one i2c bus, i.e. there is an i2c mux. Can you now identify what those two devices are?
Such fun. You're going to have to find it ... I wonder if it is mentioned in i2c somewhere?
ron
ron minnich wrote:
On Tue, Sep 9, 2008 at 11:42 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
ron minnich wrote:
On Tue, Sep 9, 2008 at 11:33 AM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Ah I see, it's pretty much how the i2cdetect app works. I just did that and I got 128 times: "smbus_error: 04, Device Error", which is the same as I got from the spd functions :/
Cr*p it seems I've overlooked that there were only 126 errors and actually 0x5a and 0x5b did reply... Does this help?
Woohoo, it does help. When you divide 0x5a by two, you get 0x2d, when you divide 0x5b by two, you get 0x2d again. 0x2d is a device that was shown by i2cdump... So I figured, maybe the vt8235_early_smbus code i copied from contains a bug and voila... the address is not shifted left by 1 bit before it's written to bit 7-1 of the IO register containing the slave address! Now smbus works. Coreboot as a whole not yet, but I think this has something to do with the payload.
the log ends with:
elfboot: Attempting to load payload. rom_stream: 0xfffe0000 - 0xfffeffff No header at 0 No header at 16 No header at 32 No header at 48 No header at 64 No header at 80 No header at 96 No header at 112 No header at 128 No header at 144 No header at 160 No header at 176 No header at 192 No header at 208 No header at 224 No header at 240 No header at 256 No header at 272 No header at 288 No header at 304 No header at 320 No header at 336 No header at 352 No header at 368 No header at 384 --- snip --- No header at 8096 header_offset is -1 Can not load ELF Image.
I was trying to use filo as a bootloader, but apparently something went wrong.
any hints?
regards Daniel
On Tue, Sep 09, 2008 at 09:41:47PM +0200, Daniel Lindenaar wrote:
the log ends with:
elfboot: Attempting to load payload. rom_stream: 0xfffe0000 - 0xfffeffff No header at 0 No header at 16 No header at 32 No header at 48 No header at 64 No header at 80 No header at 96 No header at 112 No header at 128 No header at 144 No header at 160 No header at 176 No header at 192 No header at 208 No header at 224 No header at 240 No header at 256 No header at 272 No header at 288 No header at 304 No header at 320 No header at 336 No header at 352 No header at 368 No header at 384
snip
No header at 8096 header_offset is -1 Can not load ELF Image.
I was trying to use filo as a bootloader, but apparently something went wrong.
any hints?
Yes. Disable lzma compression for your filo payload, and it will work.
What you see is coreboot not finding a proper lzma compressed filo payload, and falling back to trying to find an uncompressed payload. That fails.
For some reason lzma-compressing filo and etherboot generates an invalid image; I have not investigated why yet.
Thanks, Ward.
Ward Vandewege wrote:
On Tue, Sep 09, 2008 at 09:41:47PM +0200, Daniel Lindenaar wrote:
the log ends with:
elfboot: Attempting to load payload. rom_stream: 0xfffe0000 - 0xfffeffff No header at 0 No header at 16 No header at 32 No header at 48 No header at 64 No header at 80 No header at 96 No header at 112 No header at 128 No header at 144 No header at 160 No header at 176 No header at 192 No header at 208 No header at 224 No header at 240 No header at 256 No header at 272 No header at 288 No header at 304 No header at 320 No header at 336 No header at 352 No header at 368 No header at 384
snip
No header at 8096 header_offset is -1 Can not load ELF Image.
I was trying to use filo as a bootloader, but apparently something went wrong.
any hints?
Yes. Disable lzma compression for your filo payload, and it will work.
What you see is coreboot not finding a proper lzma compressed filo payload, and falling back to trying to find an uncompressed payload. That fails.
For some reason lzma-compressing filo and etherboot generates an invalid image; I have not investigated why yet.
Thanks, Ward.
hmmm... How do I do this? I've got: export CONFIG_COMPRESSED_PAYLOAD_LZMA:=0
in Makefile.settings and the 'payload' file in the normal and fallback dirs looks like an ELF binary...
what do i need to set/do?
Thanks, Daniel
On Tue, Sep 09, 2008 at 10:13:41PM +0200, Daniel Lindenaar wrote:
Ward Vandewege wrote:
On Tue, Sep 09, 2008 at 09:41:47PM +0200, Daniel Lindenaar wrote:
the log ends with:
elfboot: Attempting to load payload. rom_stream: 0xfffe0000 - 0xfffeffff No header at 0 No header at 16 No header at 32 No header at 48 No header at 64 No header at 80 No header at 96 No header at 112 No header at 128 No header at 144 No header at 160 No header at 176 No header at 192 No header at 208 No header at 224 No header at 240 No header at 256 No header at 272 No header at 288 No header at 304 No header at 320 No header at 336 No header at 352 No header at 368 No header at 384
snip
No header at 8096 header_offset is -1 Can not load ELF Image.
I was trying to use filo as a bootloader, but apparently something went wrong.
any hints?
Yes. Disable lzma compression for your filo payload, and it will work.
What you see is coreboot not finding a proper lzma compressed filo payload, and falling back to trying to find an uncompressed payload. That fails.
For some reason lzma-compressing filo and etherboot generates an invalid image; I have not investigated why yet.
Thanks, Ward.
hmmm... How do I do this? I've got: export CONFIG_COMPRESSED_PAYLOAD_LZMA:=0
Do you also have
CONFIG_PRECOMPRESSED_PAYLOAD
set to zero?
in Makefile.settings and the 'payload' file in the normal and fallback dirs looks like an ELF binary...
OK.
Thanks, Ward.
Ward Vandewege wrote:
On Tue, Sep 09, 2008 at 10:13:41PM +0200, Daniel Lindenaar wrote:
Ward Vandewege wrote:
On Tue, Sep 09, 2008 at 09:41:47PM +0200, Daniel Lindenaar wrote:
the log ends with:
elfboot: Attempting to load payload. rom_stream: 0xfffe0000 - 0xfffeffff No header at 0 No header at 16 No header at 32 No header at 48 No header at 64 No header at 80 No header at 96 No header at 112 No header at 128 No header at 144 No header at 160 No header at 176 No header at 192 No header at 208 No header at 224 No header at 240 No header at 256 No header at 272 No header at 288 No header at 304 No header at 320 No header at 336 No header at 352 No header at 368 No header at 384
snip
No header at 8096 header_offset is -1 Can not load ELF Image.
I was trying to use filo as a bootloader, but apparently something went wrong.
any hints?
Yes. Disable lzma compression for your filo payload, and it will work.
What you see is coreboot not finding a proper lzma compressed filo payload, and falling back to trying to find an uncompressed payload. That fails.
For some reason lzma-compressing filo and etherboot generates an invalid image; I have not investigated why yet.
Thanks, Ward.
hmmm... How do I do this? I've got: export CONFIG_COMPRESSED_PAYLOAD_LZMA:=0
Do you also have
CONFIG_PRECOMPRESSED_PAYLOAD
set to zero?
yep... I've attached the Makefile.settings file. Please have a look and see what you think?
regards, Daniel
# File: via/tk3350/tk3350/fallback/Makefile.settings is autogenerated TOP:=/usr/src/coreboot TARGET_DIR:=via/tk3350/tk3350/fallback
export ARCH:=i386 export HAVE_MOVNTI:=0 export CROSS_COMPILE:= export CC:=$(CROSS_COMPILE)gcc -m32 export HOSTCC:=gcc export OBJCOPY:=$(CROSS_COMPILE)objcopy --gap-fill 0xff export COREBOOT_VERSION:="2.0.0" export COREBOOT_BUILD:="$(shell date)" export COREBOOT_COMPILE_TIME:="$(shell date +%T)" export COREBOOT_COMPILE_BY:="$(shell whoami)" export COREBOOT_COMPILE_HOST:="$(shell hostname)" export COREBOOT_COMPILE_DOMAIN:="$(shell dnsdomainname)" export COREBOOT_COMPILER:="$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)" export COREBOOT_LINKER:="$(shell $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)" export COREBOOT_ASSEMBLER:="$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )" export CONFIG_USE_INIT:=0 export HAVE_FALLBACK_BOOT:=1 export HAVE_FAILOVER_BOOT:=0 export ROM_IMAGE_SIZE:=0x10000 export PAYLOAD_SIZE:=0x10000 export _ROMBASE:=0xffff0000 export _RESET:=0xffff0000 export _EXCEPTION_VECTORS:=0xffff0100 export STACK_SIZE:=0x2000 export HEAP_SIZE:=0x4000 export _RAMBASE:=0x4000 export USE_DCACHE_RAM:=0 export CAR_FAM10:=0 export DCACHE_RAM_BASE:=0xc0000 export DCACHE_RAM_SIZE:=0x1000 export DCACHE_RAM_GLOBAL_VAR_SIZE:=0x0 export CONFIG_AP_CODE_IN_CAR:=0 export MEM_TRAIN_SEQ:=0 export WAIT_BEFORE_CPUS_INIT:=0 export CONFIG_COMPRESS:=1 export CONFIG_UNCOMPRESSED:=0 export CONFIG_LB_MEM_TOPK:=2048 export HAVE_OPTION_TABLE:=1 export USE_OPTION_TABLE:=0 export LB_CKS_RANGE_START:=49 export LB_CKS_RANGE_END:=125 export LB_CKS_LOC:=126 export CRT0:=$(TOP)/src/arch/$(ARCH)/init/crt0.S.lb export DEBUG:=1 export CONFIG_CONSOLE_VGA:=0 export CONFIG_CONSOLE_VGA_MULTI:=0 export CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST:=0 export CONFIG_CONSOLE_BTEXT:=0 export CONFIG_CONSOLE_LOGBUF:=0 export CONFIG_CONSOLE_SROM:=0 export CONFIG_CONSOLE_SERIAL8250:=1 export CONFIG_USBDEBUG_DIRECT:=0 export DEFAULT_CONSOLE_LOGLEVEL:=9 export MAXIMUM_CONSOLE_LOGLEVEL:=9 export CONFIG_SERIAL_POST:=0 export TTYS0_BASE:=0x3f8 export TTYS0_BAUD:=115200 export TTYS0_LCS:=0x3 export CONFIG_USE_PRINTK_IN_CAR:=0 export MAINBOARD:=/usr/src/coreboot/src/mainboard/via/tk3350 export MAINBOARD_PART_NUMBER:="tk3350" export MAINBOARD_VENDOR:="via" export MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID:=0 export MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID:=0x0 export CONFIG_MAX_PCI_BUSES:=255 export CONFIG_SMP:=0 export CONFIG_MAX_CPUS:=1 export CONFIG_MAX_PHYSICAL_CPUS:=1 export CONFIG_LOGICAL_CPUS:=0 export CONFIG_AP_IN_SIPI_WAIT:=0 export SERIAL_CPU_INIT:=1 export APIC_ID_OFFSET:=0 export ENABLE_APIC_EXT_ID:=0 export LIFT_BSP_APIC_ID:=0 export CONFIG_IDE_PAYLOAD:=0 export CONFIG_ROM_PAYLOAD:=1 export CONFIG_ROM_PAYLOAD_START:=0xfffe0000 export CONFIG_COMPRESSED_PAYLOAD_NRV2B:=0 export CONFIG_COMPRESSED_PAYLOAD_LZMA:=0 export CONFIG_PRECOMPRESSED_PAYLOAD:=0 export CONFIG_SERIAL_PAYLOAD:=0 export CONFIG_FS_PAYLOAD:=0 export CONFIG_FS_EXT2:=0 export CONFIG_FS_ISO9660:=0 export CONFIG_FS_FAT:=0 export AUTOBOOT_DELAY:=2 export AUTOBOOT_CMDLINE:="hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200" export USE_WATCHDOG_ON_BOOT:=0 export CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT:=1 export CONFIG_AGP_PLUGIN_SUPPORT:=1 export CONFIG_CARDBUS_PLUGIN_SUPPORT:=1 export CONFIG_PCIX_PLUGIN_SUPPORT:=1 export CONFIG_PCIEXP_PLUGIN_SUPPORT:=1 export CONFIG_IDE:=0 export IDE_BOOT_DRIVE:=0 export IDE_OFFSET:=0 export PCI_IO_CFG_EXT:=0 export CONFIG_CHIP_NAME:=1 export HAVE_INIT_TIMER:=0 export MAX_REBOOT_CNT:=3 export FAKE_SPDROM:=0 export HAVE_ACPI_TABLES:=0 export ACPI_SSDTX_NUM:=0 export HT_CHAIN_UNITID_BASE:=1 export HT_CHAIN_END_UNITID_BASE:=32 export SB_HT_CHAIN_UNITID_OFFSET_ONLY:=1 export SB_HT_CHAIN_ON_BUS0:=0 export PCI_BUS_SEGN_BITS:=0 export MMCONF_SUPPORT:=0 export MMCONF_SUPPORT_DEFAULT:=0 export HW_MEM_HOLE_SIZEK:=0 export HW_MEM_HOLE_SIZE_AUTO_INC:=0 export CONFIG_VAR_MTRR_HOLE:=1 export K8_HT_FREQ_1G_SUPPORT:=0 export K8_REV_F_SUPPORT:=0 export CBB:=0 export CDB:=24 export HT3_SUPPORT:=0 export EXT_RT_TBL_SUPPORT:=0 export EXT_CONF_SUPPORT:=0 export DIMM_SUPPORT:=0x108 export CPU_SOCKET_TYPE:=16 export CPU_ADDR_BITS:=36 export CONFIG_VGA_ROM_RUN:=0 export CONFIG_PCI_ROM_RUN:=0 export CONFIG_PCI_64BIT_PREF_MEM:=0 export CONFIG_AMDMCT:=0 export HAVE_MP_TABLE:=0 export HAVE_PIRQ_TABLE:=1 export USE_FALLBACK_IMAGE:=1 export HAVE_HARD_RESET:=0 export CONFIG_UDELAY_IO:=1 export CONFIG_UDELAY_TSC:=0 export CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2:=0 export IRQ_SLOT_COUNT:=5 export COREBOOT_EXTRA_VERSION:=".0Fallback" export FALLBACK_SIZE:=0x20000 export ROM_SIZE:=0x40000 export ROM_SECTION_SIZE:=0x20000 export ROM_SECTION_OFFSET:=0x20000 export XIP_ROM_SIZE:=0x10000 export XIP_ROM_BASE:=0xffff0000 export USE_FAILOVER_IMAGE:=0
export VARIABLES := export VARIABLES += ARCH export VARIABLES += HAVE_MOVNTI export VARIABLES += CROSS_COMPILE export VARIABLES += CC export VARIABLES += HOSTCC export VARIABLES += OBJCOPY export VARIABLES += COREBOOT_VERSION export VARIABLES += COREBOOT_BUILD export VARIABLES += COREBOOT_COMPILE_TIME export VARIABLES += COREBOOT_COMPILE_BY export VARIABLES += COREBOOT_COMPILE_HOST export VARIABLES += COREBOOT_COMPILE_DOMAIN export VARIABLES += COREBOOT_COMPILER export VARIABLES += COREBOOT_LINKER export VARIABLES += COREBOOT_ASSEMBLER export VARIABLES += CONFIG_USE_INIT export VARIABLES += HAVE_FALLBACK_BOOT export VARIABLES += HAVE_FAILOVER_BOOT export VARIABLES += ROM_IMAGE_SIZE export VARIABLES += PAYLOAD_SIZE export VARIABLES += _ROMBASE export VARIABLES += _RESET export VARIABLES += _EXCEPTION_VECTORS export VARIABLES += STACK_SIZE export VARIABLES += HEAP_SIZE export VARIABLES += _RAMBASE export VARIABLES += USE_DCACHE_RAM export VARIABLES += CAR_FAM10 export VARIABLES += DCACHE_RAM_BASE export VARIABLES += DCACHE_RAM_SIZE export VARIABLES += DCACHE_RAM_GLOBAL_VAR_SIZE export VARIABLES += CONFIG_AP_CODE_IN_CAR export VARIABLES += MEM_TRAIN_SEQ export VARIABLES += WAIT_BEFORE_CPUS_INIT export VARIABLES += CONFIG_COMPRESS export VARIABLES += CONFIG_UNCOMPRESSED export VARIABLES += CONFIG_LB_MEM_TOPK export VARIABLES += HAVE_OPTION_TABLE export VARIABLES += USE_OPTION_TABLE export VARIABLES += LB_CKS_RANGE_START export VARIABLES += LB_CKS_RANGE_END export VARIABLES += LB_CKS_LOC export VARIABLES += CRT0 export VARIABLES += DEBUG export VARIABLES += CONFIG_CONSOLE_VGA export VARIABLES += CONFIG_CONSOLE_VGA_MULTI export VARIABLES += CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST export VARIABLES += CONFIG_CONSOLE_BTEXT export VARIABLES += CONFIG_CONSOLE_LOGBUF export VARIABLES += CONFIG_CONSOLE_SROM export VARIABLES += CONFIG_CONSOLE_SERIAL8250 export VARIABLES += CONFIG_USBDEBUG_DIRECT export VARIABLES += DEFAULT_CONSOLE_LOGLEVEL export VARIABLES += MAXIMUM_CONSOLE_LOGLEVEL export VARIABLES += CONFIG_SERIAL_POST export VARIABLES += TTYS0_BASE export VARIABLES += TTYS0_BAUD export VARIABLES += TTYS0_LCS export VARIABLES += CONFIG_USE_PRINTK_IN_CAR export VARIABLES += MAINBOARD export VARIABLES += MAINBOARD_PART_NUMBER export VARIABLES += MAINBOARD_VENDOR export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID export VARIABLES += MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID export VARIABLES += CONFIG_MAX_PCI_BUSES export VARIABLES += CONFIG_SMP export VARIABLES += CONFIG_MAX_CPUS export VARIABLES += CONFIG_MAX_PHYSICAL_CPUS export VARIABLES += CONFIG_LOGICAL_CPUS export VARIABLES += CONFIG_AP_IN_SIPI_WAIT export VARIABLES += SERIAL_CPU_INIT export VARIABLES += APIC_ID_OFFSET export VARIABLES += ENABLE_APIC_EXT_ID export VARIABLES += LIFT_BSP_APIC_ID export VARIABLES += CONFIG_IDE_PAYLOAD export VARIABLES += CONFIG_ROM_PAYLOAD export VARIABLES += CONFIG_ROM_PAYLOAD_START export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_NRV2B export VARIABLES += CONFIG_COMPRESSED_PAYLOAD_LZMA export VARIABLES += CONFIG_PRECOMPRESSED_PAYLOAD export VARIABLES += CONFIG_SERIAL_PAYLOAD export VARIABLES += CONFIG_FS_PAYLOAD export VARIABLES += CONFIG_FS_EXT2 export VARIABLES += CONFIG_FS_ISO9660 export VARIABLES += CONFIG_FS_FAT export VARIABLES += AUTOBOOT_DELAY export VARIABLES += AUTOBOOT_CMDLINE export VARIABLES += USE_WATCHDOG_ON_BOOT export VARIABLES += CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT export VARIABLES += CONFIG_AGP_PLUGIN_SUPPORT export VARIABLES += CONFIG_CARDBUS_PLUGIN_SUPPORT export VARIABLES += CONFIG_PCIX_PLUGIN_SUPPORT export VARIABLES += CONFIG_PCIEXP_PLUGIN_SUPPORT export VARIABLES += CONFIG_IDE export VARIABLES += IDE_BOOT_DRIVE export VARIABLES += IDE_OFFSET export VARIABLES += PCI_IO_CFG_EXT export VARIABLES += CONFIG_CHIP_NAME export VARIABLES += HAVE_INIT_TIMER export VARIABLES += MAX_REBOOT_CNT export VARIABLES += FAKE_SPDROM export VARIABLES += HAVE_ACPI_TABLES export VARIABLES += ACPI_SSDTX_NUM export VARIABLES += HT_CHAIN_UNITID_BASE export VARIABLES += HT_CHAIN_END_UNITID_BASE export VARIABLES += SB_HT_CHAIN_UNITID_OFFSET_ONLY export VARIABLES += SB_HT_CHAIN_ON_BUS0 export VARIABLES += PCI_BUS_SEGN_BITS export VARIABLES += MMCONF_SUPPORT export VARIABLES += MMCONF_SUPPORT_DEFAULT export VARIABLES += HW_MEM_HOLE_SIZEK export VARIABLES += HW_MEM_HOLE_SIZE_AUTO_INC export VARIABLES += CONFIG_VAR_MTRR_HOLE export VARIABLES += K8_HT_FREQ_1G_SUPPORT export VARIABLES += K8_REV_F_SUPPORT export VARIABLES += CBB export VARIABLES += CDB export VARIABLES += HT3_SUPPORT export VARIABLES += EXT_RT_TBL_SUPPORT export VARIABLES += EXT_CONF_SUPPORT export VARIABLES += DIMM_SUPPORT export VARIABLES += CPU_SOCKET_TYPE export VARIABLES += CPU_ADDR_BITS export VARIABLES += CONFIG_VGA_ROM_RUN export VARIABLES += CONFIG_PCI_ROM_RUN export VARIABLES += CONFIG_PCI_64BIT_PREF_MEM export VARIABLES += CONFIG_AMDMCT export VARIABLES += HAVE_MP_TABLE export VARIABLES += HAVE_PIRQ_TABLE export VARIABLES += USE_FALLBACK_IMAGE export VARIABLES += HAVE_HARD_RESET export VARIABLES += CONFIG_UDELAY_IO export VARIABLES += CONFIG_UDELAY_TSC export VARIABLES += CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 export VARIABLES += IRQ_SLOT_COUNT export VARIABLES += COREBOOT_EXTRA_VERSION export VARIABLES += FALLBACK_SIZE export VARIABLES += ROM_SIZE export VARIABLES += ROM_SECTION_SIZE export VARIABLES += ROM_SECTION_OFFSET export VARIABLES += XIP_ROM_SIZE export VARIABLES += XIP_ROM_BASE export VARIABLES += USE_FAILOVER_IMAGE
Makefile.settings: /mnt/usr/src/coreboot/targets/via/tk3350/tk3350/config.py /mnt/usr/src/coreboot/targets/via/tk3350/Config.lb (cd /mnt/usr/src/coreboot/targets ; export PYTHONPATH=/usr/src/coreboot/util/newconfig ; python via/tk3350/tk3350/config.py via/tk3350//Config.lb /usr/src/coreboot)
DISTRO_CFLAGS+=-fno-stack-protector DISTRO_LFLAGS+= -Wl,--build-id=none
Daniel Lindenaar wrote:
yep... I've attached the Makefile.settings file. Please have a look and see what you think?
regards, Daniel
OK, tried some other settings, but no dice. Does anybody have a different idea?
I also get this (note the failed verify):
Disabling local apic...done. CPU #0 Initialized PCI: 00:0d.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote coreboot table at: 00000530 - 00000bf4 checksum b488
Does this tell you something?
full log below...
regards, Daniel
vt8601 init starting 00000000 is the north1106 0601 0120d4 is the computed timingNOP PRECHARGE DUMMY READS CBR MRS NORMAL set ref. rate enable multi-page open Slot 00 is SDRAM 04000000 bytes 0008 is the MA type Slot 01smbus_error: 04 Device Error is empty Slot 02smbus_error: 04 Device Error is empty Slot 03smbus_error: 04 Device Error is empty vt8601 done Copying coreboot to RAM. Jumping to coreboot. coreboot-2.0.0.0Fallback Thu Sep 11 22:39:54 UTC 2008 booting... Enumerating buses... scan_static_bus for Root Device Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1106/0601] ops PCI: 00:00.0 [1106/0601] enabled malloc Enter, size 1100, free_mem_ptr 00016000 malloc 0x00016000 Capability: 0x07 @ 0x80 Capability: 0x08 @ 0x80 Capability: 0x10 @ 0x80 PCI: 00:01.0 [1106/8601] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff In vt82c686_enable 1106 0686. Initialising Devices Keyboard init... PCI: 00:07.0 [1106/0686] enabled In vt82c686_enable ffff ffff. south enable on non-south chip???Disabling static device: PCI: 00:07.1 In vt82c686_enable 1106 3038. south enable on non-south chip???PCI: 00:07.2 [1106/3038] disabled In vt82c686_enable ffff ffff. south enable on non-south chip???In vt82c686_enable 1106 3057. south enable on non-south chip???PCI: 00:07.4 [1106/3057] disabled In vt82c686_enable 1106 3058. south enable on non-south chip???PCI: 00:07.5 [1106/3058] enabled In vt82c686_enable 1106 3068. south enable on non-south chip???PCI: 00:07.6 [1106/3068] enabled PCI: devfn 0x3f, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff malloc Enter, size 1100, free_mem_ptr 0001644c malloc 0x0001644c PCI: 00:0d.0 [10ec/8139] enabled PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff In vt82c686_enable ffff ffff. south enable on non-south chip???Disabling static device: PCI: 00:13.0 PCI: devfn 0x99, bad id 0xffffffff PCI: devfn 0x9a, bad id 0xffffffff PCI: devfn 0x9b, bad id 0xffffffff PCI: devfn 0x9c, bad id 0xffffffff PCI: devfn 0x9d, bad id 0xffffffff PCI: devfn 0x9e, bad id 0xffffffff PCI: devfn 0x9f, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_resource io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:01.0 compute_allocate_resource io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:01.0 compute_allocate_resource io: base: 00000000 size: 00000000 align: 12 gran: 12 done PCI: 00:01.0 compute_allocate_resource io: base: 0000f000 size: 00000000 align: 12 gran: 12 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:01.0 compute_allocate_resource io: base: 0000f000 size: 00000000 align: 12 gran: 12 done PCI: 00:01.0 1c <- [0x000000f000 - 0x000000efff] size 0x00000000 gran 0x0c bus 01 io PCI: 00:01.0 compute_allocate_resource prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:01.0 compute_allocate_resource prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:01.0 compute_allocate_resource prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:01.0 compute_allocate_resource prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 done PCI: 00:01.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 compute_allocate_resource mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:01.0 compute_allocate_resource mem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 00:01.0 compute_allocate_resource mem: base: fff00000 size: 00000000 align: 20 gran: 20 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:01.0 compute_allocate_resource mem: base: fff00000 size: 00000000 align: 20 gran: 20 done PCI: 00:01.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 01 mem PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:07.5 10 * [0x00000400 - 0x000004ff] io PCI: 00:07.6 10 * [0x00000800 - 0x000008ff] io PCI: 00:0d.0 10 * [0x00000c00 - 0x00000cff] io PCI: 00:07.5 14 * [0x00001000 - 0x00001003] io PCI: 00:07.5 18 * [0x00001010 - 0x00001013] io Root Device compute_allocate_resource io: base: 00001014 size: 00000c14 align: 8 gran: 0 done Root Device compute_allocate_resource mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0d.0 30 * [0x00000000 - 0x0000ffff] mem PCI: 00:0d.0 14 * [0x00010000 - 0x000100ff] mem Root Device compute_allocate_resource mem: base: 00010100 size: 00010100 align: 16 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_resource io: base: 00001000 size: 00000c14 align: 8 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:07.5 10 * [0x00001000 - 0x000010ff] io PCI: 00:07.6 10 * [0x00001400 - 0x000014ff] io PCI: 00:0d.0 10 * [0x00001800 - 0x000018ff] io PCI: 00:07.5 14 * [0x00001c00 - 0x00001c03] io PCI: 00:07.5 18 * [0x00001c10 - 0x00001c13] io Root Device compute_allocate_resource io: base: 00001c14 size: 00000c14 align: 8 gran: 0 done Root Device compute_allocate_resource mem: base: febe0000 size: 00010100 align: 16 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0d.0 30 * [0xfebe0000 - 0xfebeffff] mem PCI: 00:0d.0 14 * [0xfebf0000 - 0xfebf00ff] mem Root Device compute_allocate_resource mem: base: febf0100 size: 00010100 align: 16 gran: 0 done Root Device assign_resources, bus 0 link: 0 I would set ram size to 0x10000 Kbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:07.5 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 00:07.5 14 <- [0x0000001c00 - 0x0000001c03] size 0x00000004 gran 0x02 io PCI: 00:07.5 18 <- [0x0000001c10 - 0x0000001c13] size 0x00000004 gran 0x02 io PCI: 00:07.6 10 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io PCI: 00:0d.0 10 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08 io PCI: 00:0d.0 14 <- [0x00febf0000 - 0x00febf00ff] size 0x00000100 gran 0x08 mem PCI: 00:0d.0 30 <- [0x00febe0000 - 0x00febeffff] size 0x00010000 gran 0x10 romem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 0003 PCI: 00:01.0 cmd <- 07 PCI: 00:07.0 subsystem <- 00/00 PCI: 00:07.0 cmd <- 87 PCI: 00:07.5 subsystem <- 00/00 PCI: 00:07.5 cmd <- 01 PCI: 00:07.6 subsystem <- 00/00 PCI: 00:07.6 cmd <- 01 PCI: 00:0d.0 cmd <- 03 done. Initializing devices... Root Device init PCI: 00:00.0 init VT8601 random fixup ... PCI: 00:07.0 init PCI: 00:07.5 init PCI: 00:07.6 init APIC_CLUSTER: 0 init malloc Enter, size 1100, free_mem_ptr 00016898 malloc 0x00016898 Initializing CPU #0 CPU: vendor Centaur device 673 CPU: family 06, model 07, stepping 03 WARNING: Using generic cpu ops Enabling cache
Setting fixed MTRRs(0-88) Type: UC Setting fixed MTRRs(0-88) Type: WB DONE fixed MTRRs call enable_fixed_mtrr() Setting variable MTRR 0, base: 0MB, range: 64MB, type WB ADDRESS_MASK_HIGH=0xf DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Disabling local apic...done. CPU #0 Initialized PCI: 00:0d.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote coreboot table at: 00000530 - 00000bf4 checksum b488
elfboot: Attempting to load payload. rom_stream: 0xfffe0000 - 0xfffeffff No header at 0 No header at 16 No header at 32 No header at 48 No header at 64 --- snip --- No header at 8096 header_offset is -1 Can not load ELF Image.
Hi guys, I've added some debug and it seems the elfboot code cannot read the ROM. Every byte it tries to access is 0xff. It's a 512k rom chip and elfboot tries to access 0xfffe0000-0xfffeffff. Any clues on how to fix that?
regards, Daniel
can you send the config.lb from targets? fffe whatever as the end address is wrong. Also, I bet your flash is not enabled for large addresses.
ron
ron minnich wrote:
can you send the config.lb from targets? fffe whatever as the end address is wrong. Also, I bet your flash is not enabled for large addresses.
ron
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
yeah, I've found that one already :) I've sent a few mails in monologue while fixing the stuff I came across... I've got a more or less working setup now, only certain interrupts (esp. USB) aren't arriving, which I'm looking into right now...
regards, Daniel
Hi guys, I've added some debug and it seems the elfboot code cannot read the ROM. Every byte it tries to access is 0xff. It's a 512k rom chip and elfboot tries to access 0xfffe0000-0xfffeffff. Any clues on how to fix that?
regards, Daniel
Daniel Lindenaar wrote:
Hi guys, I've added some debug and it seems the elfboot code cannot read the ROM. Every byte it tries to access is 0xff. It's a 512k rom chip and elfboot tries to access 0xfffe0000-0xfffeffff. Any clues on how to fix that?
Indeed, elfboot couldn't read the rom..., because it wasn't mapped to virtual memory. With that fixed, it loads filo, which boots linux successfully . Still some more devices need to get functional, but the main thing works... great!
Thanks to all you people helping me out. Daniel
On Sat, Sep 13, 2008 at 5:36 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
Daniel Lindenaar wrote:
Hi guys, I've added some debug and it seems the elfboot code cannot read the ROM. Every byte it tries to access is 0xff. It's a 512k rom chip and elfboot tries to access 0xfffe0000-0xfffeffff. Any clues on how to fix that?
Indeed, elfboot couldn't read the rom..., because it wasn't mapped to virtual memory. With that fixed, it loads filo, which boots linux successfully . Still some more devices need to get functional, but the main thing works... great!
Awesome, congrats! And great that your biggest issue was the southbridge, it's normally the northbridge and memory init that's the hardest part.
Thanks to all you people helping me out. Daniel
Sorry I couldn't be more help, just read your last message about the rom not being read, had I seen it earlier I might've saved you some time.
-Corey
On Thu, Sep 4, 2008 at 5:20 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot... probably something needs to be set that doesn't get set by default on cold reboot.
Not good. Can you send me a copy of your tree or a patch, and a complete boot log? I've seen the same issue, I just can't remember how I fixed it at the moment. It's something to do with either the romcc build parameters or failover code, I can't remember atm. Also, vt8601 is compatible with both c3 and p2/p3, right? Which are you using?
Anyway, it's the SMBus controller where things go wrong; the log says:
SMBUS controller not found
Check the datasheet, there's probably a bit somewhere in the LPC controller that enables the smbus controller, you'll need to flip that first, if you haven't already.
-Corey
as the last item. At least some progress is made. Besides the logging not working on cold boot, which it should at some point, I've now got something that works well enough to start proper debugging.
regards, Daniel
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On Thu, Sep 4, 2008 at 7:23 PM, Corey Osgood corey.osgood@gmail.com wrote:
Check the datasheet, there's probably a bit somewhere in the LPC controller that enables the smbus controller, you'll need to flip that first, if you haven't already.
and in case you're wondering why this is done, it is common to have duplicate functions on chipsets on the board, so some PCI functions are disabled (not even visible in config space!) unless you enable them.
ron
On Thu, Sep 4, 2008 at 11:34 PM, ron minnich rminnich@gmail.com wrote:
On Thu, Sep 4, 2008 at 7:23 PM, Corey Osgood corey.osgood@gmail.com wrote:
Check the datasheet, there's probably a bit somewhere in the LPC controller that enables the smbus controller, you'll need to flip that first, if you haven't already.
and in case you're wondering why this is done, it is common to have duplicate functions on chipsets on the board, so some PCI functions are disabled (not even visible in config space!) unless you enable them.
ron
Or in case there are multiple southbridges/SMBus controllers, and only one SMBus controller/USB controller/NIC is actually connected to anything.
-Corey
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 5:20 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot... probably something needs to be set that doesn't get set by default on cold reboot.
Not good. Can you send me a copy of your tree or a patch, and a complete boot log? I've seen the same issue, I just can't remember how I fixed it at the moment. It's something to do with either the romcc build parameters or failover code, I can't remember atm. Also, vt8601 is compatible with both c3 and p2/p3, right? Which are you using?
OK, there some small progress made. I'll send you a patch later. Here's a complete bootlog. first after a warm reboot, then after a power cycle and then after a reset.
It's a pretty long log, because I'm dumping the pci config space, however, the PCI bus/device numbers don't seem right. Notice that even though SMBus still doesn't work, coreboot actually starts on warm reboot, but it finishes with a crash.
coreboot-2.0.0.0Fallback Sat Sep 6 11:31:58 UTC 2008 starting... PCI: 00:00.00 PCI: 00:10.00 PCI: 03:10.00 PCI: 03:12.00 PCI: 03:14.00 PCI: 03:16.00 PCI: 03:18.00 PCI: 03:1a.00 PCI: 06:10.00 PCI: 06:12.00 PCI: 06:14.00 PCI: 06:16.00 PCI: 06:18.00 PCI: 06:1a.00 PCI: 06:1c.00 PCI: 06:1e.00 PCI: 00:00.00 00: 06 11 01 06 06 00 90 a2 05 00 00 06 00 08 00 00 10: 08 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 01 06 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: fe df c8 b8 00 00 08 08 80 00 08 08 08 08 08 08 60: 3f ea 00 20 e6 94 94 00 52 3c 86 2d 68 21 00 00 70: c0 88 ec 0c 0e 81 52 00 01 f4 09 00 00 00 00 00 80: 0f 41 00 00 c0 00 00 00 02 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 02 00 20 00 07 02 00 07 00 00 00 00 6e 02 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 01 01 22 42 00 b0 00 80 00 00 PCI: 00:10.00 00: 06 11 01 86 07 00 30 a2 00 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 00 00 20: 00 e4 70 e5 00 10 00 10 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 0c 00 40: 48 4d 00 44 04 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 02 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:10.00 00: 06 11 86 06 87 00 10 02 40 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 09 01 00 c0 00 80 60 e6 01 01 c4 00 00 00 00 f3 50: 0c 70 34 00 00 00 5f b0 00 06 ff 08 d0 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 01 00 00 02 00 00 f0 40 00 00 00 00 80: 00 00 00 00 00 09 00 00 00 60 00 02 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 42 00 00 00 00 00 00 00 00 00 PCI: 03:12.00 00: 06 11 71 05 07 00 90 02 06 8a 01 01 00 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d0 00 00 00 00 00 00 00 00 00 00 06 11 71 05 30: 00 00 00 00 c0 00 00 00 00 00 00 00 ff 00 00 00 40: 0a e2 09 35 1c 1f c0 00 a8 a8 a8 33 3f 00 ff 91 50: 03 03 03 07 34 00 00 00 a8 a8 a8 a8 00 00 00 00 60: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 70: 42 01 00 00 00 00 00 00 83 01 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 06 00 71 05 06 11 71 05 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:14.00 00: 06 11 38 30 07 00 10 02 1a 00 03 0c 08 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d4 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 04 00 00 40: 00 12 03 00 c2 00 33 30 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:16.00 00: 06 11 38 30 07 00 10 02 1a 00 03 0c 08 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d8 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 04 00 00 40: 00 12 03 00 c2 00 10 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:18.00 00: 06 11 57 30 00 00 90 02 40 00 80 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 57 30 30: 00 00 00 00 68 00 00 00 00 00 00 00 00 00 00 00 40: 20 84 59 00 ba 30 00 00 01 40 00 00 00 10 00 00 50: 00 6c 5f 88 00 04 00 00 00 27 db 00 06 11 57 30 60: 00 00 00 00 00 00 00 00 01 00 02 00 00 00 00 00 70: 01 60 00 00 01 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 01 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 01 00 00 00 40 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:1a.00 00: 06 11 58 30 01 00 10 02 50 00 01 04 00 00 00 00 10: 01 dc 00 00 01 e0 00 00 01 e4 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 58 30 30: 00 00 00 00 c0 00 00 00 00 00 00 00 05 03 00 00 40: 01 cc 40 1c 00 00 00 00 00 00 00 02 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:10.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:12.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:14.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:16.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:18.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1a.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1c.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1e.00 00: ec 10 39 81 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 e8 00 00 00 00 81 e5 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 passed bist failure entering enable_mainboard_devices pci_loc_dev 1106:0686 .... exiting enable_motherboard_devsvt8601 init starting 00000000 is the north1106 0601 0120smbus_error: 04 Device Error smbus_error: 04 Device Error smbus_error: 04 Device Error 84 is the computed timingNOP PRECHARGE DUMMY READS CBR MRS NORMAL set ref. rate enable multi-page open Slot 00smbus_error: 04 Device Error is empty Slot 01smbus_error: 04 Device Error is empty Slot 02smbus_error: 04 Device Error is empty Slot 03smbus_error: 04 Device Error is empty vt8601 done Copying coreboot to RAM. Jumping to coreboot. coreboot-2.0.0.0Fallback Sat Sep 6 11:31:58 UTC 2008 booting... Enumerating buses... scan_static_bus for Root Device Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1106/0601] ops PCI: 00:00.0 [1106/0601] enabled malloc Enter, size 1100, free_mem_ptr 00016000 malloc 0x00016000 Capability: 0x07 @ 0x80 Capability: 0x08 @ 0x80 Capability: 0x10 @ 0x80 PCI: 00:01.0 [1106/8601] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff In vt82c686_enable 1106 0686. Initialising Devices Keyboard init... PCI: 00:07.0 [1106/0686] enabled In vt82c686_enable 1106 0571. south enable on non-south chip???PCI: 00:07.1 [1106/0571] ops PCI: 00:07.1 [1106/0571] enabled In vt82c686_enable 1106 3038. south enable on non-south chip???PCI: 00:07.2 [1106/3038] disabled In vt82c686_enable ffff ffff. south enable on non-south chip???In vt82c686_enable 1106 3057. south enable on non-south chip???PCI: 00:07.4 [1106/3057] disabled In vt82c686_enable 1106 3058. south enable on non-south chip???PCI: 00:07.5 [1106/3058] enabled In vt82c686_enable ffff ffff. south enable on non-south chip???Disabling static device: PCI: 00:07.6 PCI: devfn 0x3f, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff malloc Enter, size 1100, free_mem_ptr 0001644c malloc 0x0001644c PCI: 00:0d.0 [10ec/8139] enabled PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff In vt82c686_enable ffff ffff. south enable on non-south chip???Disabling static device: PCI: 00:13.0 PCI: devfn 0x99, bad id 0xffffffff PCI: devfn 0x9a, bad id 0xffffffff PCI: devfn 0x9b, bad id 0xffffffff PCI: devfn 0x9c, bad id 0xffffffff PCI: devfn 0x9d, bad id 0xffffffff PCI: devfn 0x9e, bad id 0xffffffff PCI: devfn 0x9f, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 malloc Enter, size 1100, free_mem_ptr 00016898 malloc 0x00016898 PCI: 01:00.0 [1023/8500] enabled PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_resource io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0
coreboot-2.0.0.0Fallback Sat Sep 6 11:31:58 UTC 2008 starting...
coreboot-2.0.0.0Fallback Sat Sep 6 11:31:58 UTC 2008 starting... PCI: 00:00.00 PCI: 00:10.00 PCI: 03:10.00 PCI: 03:14.00 PCI: 03:16.00 PCI: 03:18.00 PCI: 03:1a.00 PCI: 03:1c.00 PCI: 06:10.00 PCI: 06:12.00 PCI: 06:14.00 PCI: 06:16.00 PCI: 06:18.00 PCI: 06:1a.00 PCI: 06:1c.00 PCI: 06:1e.00 PCI: 00:00.00 00: 06 11 01 06 06 00 90 22 05 00 00 06 00 00 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: ac 08 80 00 00 00 01 01 40 00 13 f6 91 30 91 ca 60: 00 00 00 00 ec ec ec 00 02 00 00 01 00 09 00 00 70: 00 00 00 00 00 00 00 00 00 f0 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 02 00 20 00 03 02 00 07 00 00 00 00 08 02 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 01 01 00 00 00 00 00 00 00 00 PCI: 00:10.00 00: 06 11 01 86 07 00 30 02 00 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 22 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:10.00 00: 06 11 86 06 87 00 10 02 40 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 03 00 04 00 00 00 00 03 50: 0e 00 00 00 00 00 00 00 00 04 ff 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 01 00 00 00 60 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 42 00 00 00 00 00 00 00 00 00 PCI: 03:14.00 00: 06 11 38 30 00 00 10 02 1a 00 03 0c 00 16 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: e1 fc 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 04 00 00 40: 00 00 01 00 06 00 11 10 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:16.00 00: 06 11 38 30 00 00 10 02 1a 00 03 0c 00 16 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: e1 fc 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 04 00 00 40: 00 00 01 00 06 00 10 40 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:18.00 00: 06 11 57 30 00 00 90 02 40 00 00 00 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 68 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 50 00 00 00 00 00 01 00 00 00 00 00 00 00 50: 00 6d 3f 00 00 00 00 00 00 a1 8b 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 00 02 00 00 00 00 00 70: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:1a.00 00: 06 11 58 30 00 00 10 02 50 00 01 04 00 00 00 00 10: 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 03 00 00 40: 00 00 00 1c 00 00 00 00 00 00 00 02 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:1c.00 00: 06 11 68 30 00 00 10 02 30 00 80 07 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 03 00 00 40: 00 00 00 1c 00 00 00 00 00 00 00 02 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:10.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:12.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:14.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:16.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:18.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1a.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1c.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1e.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 passed bist failure entering enable_mainboard_devices pci_loc_dev 1106:0686 .... exiting enable_motherboard_devsvt8601 init starting 00000000 is the north1106 0601 0120smbus_error: 04 Device Error smbus_error: 04 Device Error smbus_error: 04 Device Error 84 is the computed timingNOP PRECHARGE DUMMY READS CBR MRS NORMAL set ref. rate enable multi-page open Slot 00smbus_error: 04 Device Error is empty Slot 01smbus_error: 04 Device Error is empty Slot 02smbus_error: 04 Device Error is empty Slot 03smbus_error: 04 Device Error is empty vt8601 done Copying coreboot to RAM. Jumping to coreboot.
coreboot-2.0.0.0Fallback Sat Sep 6 11:31:58 UTC 2008 starting... PCI: 00:00.00 PCI: 00:10.00 PCI: 03:10.00 PCI: 03:14.00 PCI: 03:16.00 PCI: 03:18.00 PCI: 03:1a.00 PCI: 03:1c.00 PCI: 06:10.00 PCI: 06:12.00 PCI: 06:14.00 PCI: 06:16.00 PCI: 06:18.00 PCI: 06:1a.00 PCI: 06:1c.00 PCI: 06:1e.00 PCI: 00:00.00 00: 06 11 01 06 06 00 90 22 05 00 00 06 00 00 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: ac 08 80 00 00 00 01 01 40 00 00 00 00 00 00 00 60: 3f 00 00 00 ec ec ec 00 02 00 00 01 00 0f 00 00 70: 00 00 00 00 00 00 00 00 00 f0 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 02 00 20 00 03 02 00 07 00 00 00 00 08 02 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 01 01 00 00 00 00 00 00 00 00 PCI: 00:10.00 00: 06 11 01 86 07 00 30 02 00 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 22 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:10.00 00: 06 11 86 06 87 00 10 02 40 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 03 01 04 00 00 00 00 03 50: 0e 00 00 00 00 00 00 00 00 04 ff 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 01 00 00 00 60 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 42 00 00 00 00 00 00 00 00 00 PCI: 03:14.00 00: 06 11 38 30 00 00 10 02 1a 00 03 0c 00 16 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: e1 fc 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 04 00 00 40: 00 00 01 00 c6 00 33 30 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:16.00 00: 06 11 38 30 00 00 10 02 1a 00 03 0c 00 16 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: e1 fc 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 04 00 00 40: 00 00 01 00 c2 00 10 c0 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:18.00 00: 06 11 57 30 00 00 90 02 40 00 00 00 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 68 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 50 00 00 00 00 00 01 00 00 00 00 00 00 00 50: 00 6d 3f 00 00 00 00 00 00 a1 8b 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 00 02 00 00 00 00 00 70: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:1a.00 00: 06 11 58 30 00 00 10 02 50 00 01 04 00 00 00 00 10: 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 03 00 00 40: 00 00 00 1c 00 00 00 00 00 00 00 02 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 03:1c.00 00: 06 11 68 30 00 00 10 02 30 00 80 07 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 d0 00 00 00 00 00 00 00 00 03 00 00 40: 00 00 00 1c 00 00 00 00 00 00 00 02 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:10.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:12.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:14.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:16.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:18.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1a.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1c.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 PCI: 06:1e.00 00: ec 10 39 81 00 00 90 02 10 00 00 02 00 00 00 00 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 39 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 passed bist failure entering enable_mainboard_devices pci_loc_dev 1106:0686 .... exiting enable_motherboard_devsvt8601 init starting 00000000 is the north1106 0601 0120smbus_error: 04 Device Error smbus_error: 04 Device Error smbus_error: 04 Device Error 84 is the computed timingNOP PRECHARGE DUMMY READS CBR MRS NORMAL set ref. rate enable multi-page open Slot 00smbus_error: 04 Device Error is empty Slot 01smbus_error: 04 Device Error is empty Slot 02smbus_error: 04 Device Error is empty Slot 03smbus_error: 04 Device Error is empty vt8601 done Copying coreboot to RAM. Jumping to coreboot.
Appreciate your help
regards, Daniel
Anyway, it's the SMBus controller where things go wrong; the log says:
SMBUS controller not found
Check the datasheet, there's probably a bit somewhere in the LPC controller that enables the smbus controller, you'll need to flip that first, if you haven't already.
-Corey
as the last item. At least some progress is made. Besides the logging not working on cold boot, which it should at some point, I've now got something that works well enough to start proper debugging.
regards, Daniel
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-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Daniel Lindenaar wrote:
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 5:20 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot... probably something needs to be set that doesn't get set by default on cold reboot.
Not good. Can you send me a copy of your tree or a patch, and a complete boot log? I've seen the same issue, I just can't remember how I fixed it at the moment. It's something to do with either the romcc build parameters or failover code, I can't remember atm. Also, vt8601 is compatible with both c3 and p2/p3, right? Which are you using?
OK, there some small progress made. I'll send you a patch later. Here's a complete bootlog. first after a warm reboot, then after a power cycle and then after a reset.
Here's the patch... Hope you can help <:)
Daniel Lindenaar wrote:
Daniel Lindenaar wrote:
Corey Osgood wrote:
On Thu, Sep 4, 2008 at 5:20 PM, Daniel Lindenaar daniel-coreboot@lindenaar.eu wrote:
hmmm it's working partly, it seems. First i did something wrong that skrewed up the com port setup, which I fixed. I now get the debug messages I added via the serial line, but, strangely, only when i do a (warm) reboot from a running linux, not with a cold boot... probably something needs to be set that doesn't get set by default on cold reboot.
Not good. Can you send me a copy of your tree or a patch, and a complete boot log? I've seen the same issue, I just can't remember how I fixed it at the moment. It's something to do with either the romcc build parameters or failover code, I can't remember atm. Also, vt8601 is compatible with both c3 and p2/p3, right? Which are you using?
OK, there some small progress made. I'll send you a patch later. Here's a complete bootlog. first after a warm reboot, then after a power cycle and then after a reset.
Here's the patch... Hope you can help <:)
ow I forgot the target dir... here's the new one
sorry Daniel
-- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Daniel Lindenaar wrote:
I'm currently trying to get it built, but just found out that SMBus seems to be needed for the RAM stuff, so I'm porting it over from the 8235.
Be careful, the 686 has different PCI IDs and different offsets..
on the 8235 the smbus io base is at 0xd0, on the c686 it's at 0x90