David Hendricks (dhendrix@chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2346
-gerrit
commit f59f3567a06109971261c5d105b7332f4c331c94 Author: David Hendricks dhendrix@chromium.org Date: Sat Feb 9 16:42:23 2013 -0800
exynos/snow: set SPI clock rate in romstage main
This moves the setting of SPI clock rate into romstage's main, which allows us to eliminate a bunch of dependencies from the bootblock (about 7KB worth).
Change-Id: I371499bb4af6a6aa838294bc56f9dbc21864957a Signed-off-by: David Hendricks dhendrix@chromium.org --- src/cpu/samsung/exynos5-common/spi.c | 1 - src/mainboard/google/snow/romstage.c | 4 ++++ 2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c index 90b74c0..0e5d5e5 100644 --- a/src/cpu/samsung/exynos5-common/spi.c +++ b/src/cpu/samsung/exynos5-common/spi.c @@ -83,7 +83,6 @@ static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo,
int exynos_spi_open(struct exynos_spi *regs) { - clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ /* set the spi1 GPIO */
// TODO Some of these should be done in board's bootblock file. diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index c0bb6f4..719337b 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -24,8 +24,10 @@ #include <cbfs.h> #include <common.h>
+#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/setup.h> +#include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/clock_init.h>
#include <console/console.h> @@ -53,6 +55,8 @@ void main(void) int ret; void *entry;
+ clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ + /* Clock must be initialized before console_init, otherwise you may need * to re-initialize serial console drivers again. */ mem = get_mem_timings();