Hi guys,
I posted a new 440BX RAM init code a few days ago that was segfaulting romcc, and I didn't get any response.
In the meantime I have narrowed the cause to this code fragment, with enough wrapper added so it can be fed to romcc on its own:
void romcc_fail(void) { int dimm03 = 0; int dimm47 = 0; char mbsc[5]; char mbfs[3]; /* begin actual fragment */ if (dimm03 > 2) { mbsc[4] |= 0x80; mbsc[1] |= 0x28; mbfs[2] |= 0x40; mbfs[0] |= 0x60; } else { mbsc[4] |= 0xc0; mbsc[1] |= 0x3c; } if ((dimm03 + dimm47) > 4) { mbsc[4] = 0xba; mbsc[0] = 0x30; mbfs[0] |= 0x02; } else { mbsc[0] = 0x2c; } if (dimm47 > 2) { mbsc[4] |= 0x20; mbsc[1] |= 0x02; mbsc[0] |= 0x80; mbfs[2] |= 0x20; mbfs[0] |= 0x18; } else { mbsc[4] |= 0x30; mbsc[1] |= 0x03; mbsc[0] |= 0xc0; } /* end actual fragment */ }
There are three similar constructs, any one of them is enough to cause a segfault.
mbfs and mbsc are meant to be an array of bytes that make up the MBFS and MBSC registers in the 440BX, to be written out to it once they're all set.
Thanks for all help Keith
Am 11.03.2010 04:25, schrieb Keith Hui:
Hi guys,
I posted a new 440BX RAM init code a few days ago that was segfaulting romcc, and I didn't get any response.
In the meantime I have narrowed the cause to this code fragment, with enough wrapper added so it can be fed to romcc on its own:
Thank you for the test case, I could reproduce the crash.
Attached patch fixes the romcc segfaults when using the |=, +=, ^= operators on array fields and produces reasonably looking code.
I did some tests to verify that the behaviour didn't change, but your test case compiles to no code (except some useless jmp instructions) as it has no side effects, so I can only verify it builds. Please test it on your real world code.
Signed-off-by: Patrick Georgi patrick.georgi@coresystems.de
Keith Hui wrote:
I posted a new 440BX RAM init code a few days ago that was segfaulting romcc, and I didn't get any response.
There aren't very many romcc ninjas.
void romcc_fail(void) { int dimm03 = 0; int dimm47 = 0; char mbsc[5]; char mbfs[3];
This is already putting some pressure on register allocation. Can you help romcc by making dimm03 and dimm47 into char also? Consistently using unsigned may also help.
mbfs and mbsc are meant to be an array of bytes that make up the MBFS and MBSC registers in the 440BX, to be written out to it once they're all set.
Would it be possible to not store, and instead write out to registers as soon as possible? This will also help romcc.
//Peter