Hello,
The Coreboot will need ACPI bytecode (AML) generotor. Right now it uses quite hackish solution. It let the compiler compile the the table, and it has hardcoded binary offsets. Check amdk8_acpi.c. It somehow works, but for ACPI P-states we will need to generate the ACPI objects at runtime. This may be necessary also for C7 and perhaps for Intel too.
I wrote some proof of concept of such generator. Now it generates a skelleton for P-states and also some objects for amdk8_acpi.c
how to run it: compile source touch test run it iasl -d test
Examine test.dsl
Works for me ;)
Rudolf
On 25.12.2008 22:13, Rudolf Marek wrote:
Hello,
The Coreboot will need ACPI bytecode (AML) generotor. Right now it uses quite hackish solution. It let the compiler compile the the table, and it has hardcoded binary offsets. Check amdk8_acpi.c. It somehow works, but for ACPI P-states we will need to generate the ACPI objects at runtime. This may be necessary also for C7 and perhaps for Intel too.
I wrote some proof of concept of such generator. Now it generates a skelleton for P-states and also some objects for amdk8_acpi.c
The AMD DBM690T target already has code in src/mainboard/amd/dbm690t/acpi_tables.c to autogenerate the SSDT with ACPI P-States. Can you look at that code and comment?
Thanks!
Regards, Carl-Daniel