Hi guys, I want place Xvesa (kdrive) inside BIOS, to get graphic mode.
First I compiled Xvesa with uclibc, created a rootfs tree with it and compiled the kernel with it inside (CONFIG_INITRAMFS_SOURCE pointing to this directory).
Then created a GRUB option to call this kernel image. Using the original BIOS (commercial) it goes fine. I got graphic mode running correctly from this 1.7MB kernel image (initramfs as final rootfs). It will fit in a 2MB flash.
After I compiled LinuxBIOS with the original VGA BIOS ROM attached and filo as payload. LinuxBIOS started with VGA text mode and FILO call the GRUB correctly. GRUB start my kernel image but graphic mode don't start. I get this error message:
"Interrupt pointer (seg 32 off 0) doesn't point at ROM"
This error message is from vm86.c: http://webcvs.freedesktop.org/xserver/xserver/hw/kdrive/vesa/vm86.c?revision...
From this source I think the interrupt pointer need point to somewhere
after 0xC0000 segment, but it is pointing to wrong place (segment 0x32).
I don't know why it is occuring with LinuxBIOS. All appear go fine, but just the Interrupt Pointer is wrong.
There is someone running X Server (with Driver "vesa" on X config)? I verified this error occur with default X Server as with Xvesa.
Cheers,
Alan
P.S.: I am sending the serial console log attached, maybe it give some help.
LinuxBIOS-2.0.0_s2850_Fallback Sun Feb 25 16:10:36 BRT 2007 starting... SBLink=00 NC node|link=00 Ram1.00 Ram2.00 Ram3 Initializing memory: done Ram4 v_esp=000cffe4 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Copying LinuxBIOS to RAM. src=fffe0000 dst=00004000 linxbios_ram.nrv2b length = 0000d7d7 linxbios_ram.bin length = 00023150 Jumping to LinuxBIOS. LinuxBIOS-2.0.0_s2850_Fallback Sun Feb 25 18:34:50 BRT 2007 booting... Enumerating buses... APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=0 CPU: APIC: 00 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 01:00.0 [1022/7460] enabled PCI: 01:01.0 [1022/7460] enabled next_unitid: 0005 PCI: pci_scan_bus for bus 01 PCI: 01:01.0 [1022/7460] enabled PCI: 01:02.0 [1022/7468] enabled PCI: 01:02.1 [1022/7469] enabled PCI: 01:02.2 [1022/746a] enabled PCI: 01:02.3 [1022/746b] enabled PCI: 01:02.5 [1022/746d] enabled PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [1022/7464] enabled PCI: 02:00.1 [1022/7464] enabled PCI: 02:0b.0 [1002/4752] enabled PCI: 02:0d.0 [14e4/1653] enabled PCI: 02:0e.0 [14e4/1653] enabled PCI: pci_scan_bus returning with max=002 PNP: 002e.0 enabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled smbus: PCI: 01:02.3[0]->I2C: 01:50 enabled smbus: PCI: 01:02.3[0]->I2C: 01:51 enabled smbus: PCI: 01:02.3[0]->I2C: 01:52 enabled smbus: PCI: 01:02.3[0]->I2C: 01:53 enabled PCI: pci_scan_bus returning with max=002 PCI: pci_scan_bus returning with max=002 done Allocating resources... Reading resources... PCI: 01:01.0 24 <- [0x00fff00000 - 0x00ffefffff] bus 02 prefmem Done reading resources. Allocating VGA resource PCI: 02:0b.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 01:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device PCI: 00:18.0 1b8 <- [0x00fd100000 - 0x00fd0fffff] prefmem <node 0 link 0> PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000002fff] io <node 0 link 0> PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fd0fffff] mem <node 0 link 0> PCI: 01:01.0 1c <- [0x0000001000 - 0x0000001fff] bus 02 io PCI: 01:01.0 20 <- [0x00fc000000 - 0x00fd0fffff] bus 02 mem PCI: 02:00.0 10 <- [0x00fd040000 - 0x00fd040fff] mem PCI: 02:00.1 10 <- [0x00fd041000 - 0x00fd041fff] mem PCI: 02:0b.0 10 <- [0x00fc000000 - 0x00fcffffff] mem PCI: 02:0b.0 14 <- [0x0000001000 - 0x00000010ff] io PCI: 02:0b.0 18 <- [0x00fd042000 - 0x00fd042fff] mem PCI: 02:0b.0 30 <- [0x00ffe00000 - 0x00ffe1ffff] romem PCI: 02:0d.0 10 <- [0x00fd000000 - 0x00fd00ffff] mem64 PCI: 02:0d.0 30 <- [0x00fd010000 - 0x00fd01ffff] romem PCI: 02:0e.0 10 <- [0x00fd020000 - 0x00fd02ffff] mem64 PCI: 02:0e.0 30 <- [0x00fd030000 - 0x00fd03ffff] romem PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] io PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] irq PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] drq PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] irq PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] io PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] irq PCI: 01:02.1 20 <- [0x0000002860 - 0x000000286f] io PCI: 01:02.2 10 <- [0x0000002840 - 0x000000285f] io PCI: 01:02.3 58 <- [0x0000002000 - 0x00000020ff] io PCI: 01:02.5 10 <- [0x0000002400 - 0x00000024ff] io PCI: 01:02.5 14 <- [0x0000002800 - 0x000000283f] io PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> Done setting resources. Done allocating resources. Enabling resources... PCI: 00:18.0 cmd <- 140 PCI: 01:01.0 bridge ctrl <- 000b PCI: 01:01.0 cmd <- 147 PCI: 02:00.0 subsystem <- 10f1/2850 PCI: 02:00.0 cmd <- 142 PCI: 02:00.1 subsystem <- 10f1/2850 PCI: 02:00.1 cmd <- 142 PCI: 02:0b.0 subsystem <- 10f1/2850 PCI: 02:0b.0 cmd <- 1c3 PCI: 02:0d.0 cmd <- 142 PCI: 02:0e.0 cmd <- 142 PCI: 01:02.0 subsystem <- 10f1/2850 PCI: 01:02.0 cmd <- 14f w83627hf hwm smbus enabled PCI: 01:02.1 subsystem <- 10f1/2850 PCI: 01:02.1 cmd <- 141 PCI: 01:02.2 subsystem <- 10f1/2850 PCI: 01:02.2 cmd <- 141 PCI: 01:02.3 subsystem <- 10f1/2850 PCI: 01:02.3 cmd <- 141 PCI: 01:02.5 subsystem <- 10f1/2850 PCI: 01:02.5 cmd <- 141 PCI: 00:18.1 subsystem <- 10f1/2850 PCI: 00:18.1 cmd <- 140 PCI: 00:18.2 subsystem <- 10f1/2850 PCI: 00:18.2 cmd <- 140 PCI: 00:18.3 cmd <- 140 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor AMD device f5a CPU: family 0f, model 05, stepping 0a Enabling cache
Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 512MB, type WB DONE variable MTRRs Clear out the extra MTRR's
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success CPU model AMD Athlon(tm) 64 FX-53 Processor Setting up local apic... apic_id: 0x00 done. Clearing memory 2048K - 524288K: ------- done CPU #0 Initialized All AP CPUs stopped PCI: 00:18.0 init PCI: 01:01.0 init PCI: 02:0b.0 init rom address for PCI: 02:0b.0 = ffe00000 copying VGA ROM Image from 0xffe00000 to 0xc0000, 0x9000 bytes entering emulator halt_sys: file /home/alan/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 47PCI: 01:02.0 init amd8111: ioapic bsp_apicid = 00 RTC Init Invalid CMOS LB checksum enabling HPET @0xfed00000 PNP: 002e.0 init PNP: 002e.2 init PNP: 002e.5 init PNP: 002e.b init PCI: 01:02.1 init IDE1 IDE0 PCI: 01:02.3 init set power on after power fail PCI: 00:18.1 init PCI: 00:18.2 init PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 02:0d.0 init rom address for PCI: 02:0d.0 = fd000000 Incorrect Expansion ROM Header Signature 14e4 PCI: 02:0e.0 init rom address for PCI: 02:0e.0 = fd020000 Incorrect Expansion ROM Header Signature 14e4 Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 /home/alan/LinuxBIOSv2/src/arch/i386/boot/pirq_routing.c: 36:check_pirq_routddone. Wrote the mp table end at: 00000020 - 000001e8 Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 00000db8 checksum 2104
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3
rom_stream: 0xffe09000 - 0xfffdffff Found ELF candidate at offset 0 Dropping non PT_LOAD segment New segment addr 0x10000 size 0x1ab24 offset 0x134 filesize 0x561c (cleaned up) New segment addr 0x10000 size 0x1ab24 offset 0x134 filesize 0x561c New segment addr 0x91000 size 0x70 offset 0x5750 filesize 0x0 (cleaned up) New segment addr 0x91000 size 0x70 offset 0x5750 filesize 0x0 New segment addr 0x100000 size 0x700000 offset 0x5750 filesize 0x1bb5f9 (cleaned up) New segment addr 0x100000 size 0x700000 offset 0x5750 filesize 0x19Loading Segment: addr: 0x000000001ffb0000 memsz: 0x000000000001ab24 filesz: 0x0cClearing Segment: addr: 0x000000001ffb561c memsz: 0x0000000000015508 Loading Segment: addr: 0x0000000000091000 memsz: 0x0000000000000070 filesz: 0x00Clearing Segment: addr: 0x0000000000091000 memsz: 0x0000000000000070 Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000700000 filesz: 0x09Clearing Segment: addr: 0x00000000002bb5f9 memsz: 0x0000000000544a07 Jumping to boot code at 0x10000 Firmware type: LinuxBIOS
Alan, this is an interesting idea. I wonder how I would replicate your setup in order to try to replicate your problem? I am not sure why this is happening, UNLESS ... does Xvesa make some assumptions about the location of tables or information it uses to start up? What does Xvesa do? The only VESA stuff I know about (in plan 9) might be dependent on a fixed BIOS location for some things.
ron