I use the fallback and the normal mode, if my chip has a size 256*1024, what size of FALLBACK_SIZE and ROM_IMAGE_SIZE I can choose, I have some difficulty to define the role of the ROM_IMAGE_SIZE, the ROM_SIZE define the size of the chip, the FALLBACK_SIZE define the size of the fallback mode, but the ROM_IMAGE_SIZE ??? I don't understand the goal of ROM_IMAGE_SIZE, if you have an better explaination that on the Web site, I would appreciate much.
Just to make sure first, after changing anything in the config'lb or options.lb files, you have to re-run ./buildtarget to recreate the make files with the new values.
If I understand it right, this is pretty much how it works, and some reasonable values for a 256k flash part:
ROM_IMAGE_SIZE determines the amount of space for lb's fallback image to take up, 64kb (64*1024, or 0x10000). The minimum size of this is dependent on the code, I don't know how you'd find it out other than trial-and-error, but there must be a way.
FALLBACK_SIZE determines the space for the fallback lb image + the payload for the "fallback.rom", 128kb (128*1024, or 0x20000). This means 64kb for lb+64kb for the payload. This at minimum needs to be (obviously) the size of your built code + the size of your payload. Also, make sure your Options.lb contains "default HAVE_FALLBACK_BOOT=1".
ROM_IMAGE_SIZE again determines the size for the normal image's code, 64kb
ROM_SIZE determines the size of the whole chip, 256kb. LB then computes ROM_SIZE - FALLBACK_SIZE to get the size for the "normal.rom", which is the normal lb code + the payload again.
At the end, lb merges the fallback.rom(128k) and normal.rom (128k) to give you linuxbios.rom (256k).
There are some other options, like PAYLOAD_SIZE and ROM_SECTION_SIZE, these should be computed by your src/../Config.lb based on the other values. If you still have problems, grab the config.lb's and options.lb from the asus p2b and use the values in those, they build a 256k flash part for me just fine.
-Corey
Thank's for all of your explaination, now have a better vision of the things, thanks again ;)
regards
Ccases
I use the fallback and the normal mode, if my chip has a size
256*1024,
what size of FALLBACK_SIZE and ROM_IMAGE_SIZE I can choose, I have some difficulty to define the role of the ROM_IMAGE_SIZE, the ROM_SIZE define the size of the chip, the FALLBACK_SIZE define the size of the fallback mode, but the ROM_IMAGE_SIZE ??? I don't understand the goal of ROM_IMAGE_SIZE, if you have an better explaination that on the Web site, I would appreciate much.
Just to make sure first, after changing anything in the config'lb or options.lb files, you have to re-run ./buildtarget to recreate the make files with the new values.
[...]
-Corey
Thank's for all of your explaination, now have a better vision of the things, thanks again ;)
regards
Ccases
The compilation and the size of linuxbios.rom is ok now.
Some others questions :
For initialise the serial port for debugging, what is the command and or to place it ?
If I have just create the file linuxbios.rom with etherboot for payload, and if I test to flash my rom, normaly even if all doesn't function, at least will have something on the screen or not ? if not I depend on my VGA ?
Thank's by advance for your help.
Regards
Ccases
* ccases@navista.fr ccases@navista.fr [070321 11:07]:
For initialise the serial port for debugging, what is the command and or to place it ?
The serial init function is usually called from the mainboard's auto.c. The chip specific code is in the superio/ directory.
If I have just create the file linuxbios.rom with etherboot for payload, and if I test to flash my rom, normaly even if all doesn't function, at least will have something on the screen or not ? if not I depend on my VGA ?
No, if things don't work you will not see something on your screen. VGA setup is so complex that it basically almost the last thing that happens in LinuxBIOS. So when you see something on the screen, the whole setup basically worked fine.
All LinuxBIOS ports have serial console though. Or USB debug console for those boards with no SuperIO/serial port.
Stefan
- ccases@navista.fr ccases@navista.fr [070321 11:07]:
For initialise the serial port for debugging, what is the command and or to place it ?
The serial init function is usually called from the mainboard's auto.c. The chip specific code is in the superio/ directory.
If I have just create the file linuxbios.rom with etherboot for payload, and if I test to flash my rom, normaly even if all doesn't function, at least will have something on the screen or not ? if not I depend on my VGA ?
No, if things don't work you will not see something on your screen. VGA setup is so complex that it basically almost the last thing that happens in LinuxBIOS. So when you see something on the screen, the whole setup basically worked fine.
All LinuxBIOS ports have serial console though. Or USB debug console for those boards with no SuperIO/serial port.
Stefan
-- coresystems GmbH ⢠Brahmsstr. 16 ⢠D-79104 Freiburg i. Br. Tel.: +49 761 7668825 ⢠Fax: +49 761 7664613 Email: info@coresystems.de ⢠http://www.coresystems.de/
-- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
Thanks for your explanation ;)
++
Hi,
I'm in phase of test and it's requires an wire db9 female/db9 female for debug mode, I have see on the web site something about, but not an valide diagram of the pin connection of the wire. If somebody has a diagram, I'm realy interest, and I thank you her by advance.
regards
Ccases
* ccases@navista.fr ccases@navista.fr [070321 15:05]:
Hi,
I'm in phase of test and it's requires an wire db9 female/db9 female for debug mode, I have see on the web site something about, but not an valide diagram of the pin connection of the wire. If somebody has a diagram, I'm realy interest, and I thank you her by advance.
You need a serial null modem cable. basically the receive and send lines are over cross.
- ccases@navista.fr ccases@navista.fr [070321 15:05]:
Hi,
I'm in phase of test and it's requires an wire db9 female/db9 female for debug mode, I have see on the web site something about, but not an valide diagram of the pin connection of the wire. If somebody has a diagram, I'm realy interest, and I thank you her by advance.
You need a serial null modem cable. basically the receive and send lines are over cross.
-- coresystems GmbH ⢠Brahmsstr. 16 ⢠D-79104 Freiburg i. Br. Tel.: +49 761 7668825 ⢠Fax: +49 761 7664613 Email: info@coresystems.de ⢠http://www.coresystems.de/
ok it's well what I thought, thanks for your help
regards
Ccases