Patch set updated for coreboot: fda6a3c Trinity wrapper code improvement.

[Zheng Bao]

Zheng Bao ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1241

-gerrit

commit fda6a3cf882adecf8ffc56dfeafd7b28ef215eda
Author: zbao 
Date:   Thu Jul 19 16:38:12 2012 +0800

Trinity wrapper code improvement.

Set the default location of hudson firmware to 3rdparty.
    Move UMA code from mainboard to northbridge.

Change-Id: I11afea0c7fd04aa84a629dc762704c42baf002df
    Signed-off-by: Zheng Bao 
    Signed-off-by: zbao 
---
 src/northbridge/amd/agesa/family15tn/northbridge.c |   48 ++++++++++++++++++++
 src/southbridge/amd/agesa/hudson/Kconfig           |    6 +-
 2 files changed, 51 insertions(+), 3 deletions(-)

diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 1e14e8e..dc04afd 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -613,6 +613,54 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
 }
 #endif

+#define ONE_MB  0x100000
+
+void setup_uma_memory(void)
+{
+#if CONFIG_GFXUMA
+	msr_t msr, msr2;
+	uint32_t sys_mem;
+
+	/* TOP_MEM: the top of DRAM below 4G */
+	msr = rdmsr(TOP_MEM);
+	printk
+		(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
+		 __func__, msr.lo, msr.hi);
+
+	/* TOP_MEM2: the top of DRAM above 4G */
+	msr2 = rdmsr(TOP_MEM2);
+	printk (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
+			__func__, msr2.lo, msr2.hi);
+
+	/* refer to UMA Size Consideration in Family15h BKDG. */
+	/* Please reference MemNGetUmaSizeOR () */
+	/*
+	 *     Total system memory   UMASize
+	 *     >= 2G                 512M
+	 *     >=1G                  256M
+	 *     <1G                    64M
+	 */
+	sys_mem = msr.lo + 16 * ONE_MB;   // Ignore 16MB allocated for C6 when finding UMA size
+	if ((msr2.hi & 0x0000000F) || (sys_mem >= 2048 * ONE_MB)) {
+		uma_memory_size = 512 * ONE_MB;
+	} else if (sys_mem >= 1024 * ONE_MB) {
+		uma_memory_size = 256 * ONE_MB;
+	} else {
+		uma_memory_size = 64 * ONE_MB;
+	}
+	uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
+
+	printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
+			__func__, uma_memory_size, uma_memory_base);
+
+	/* TODO: TOP_MEM2 */
+#else
+	uma_memory_size = 256 * ONE_MB; /* 256M recommended UMA */
+	uma_memory_base = 768 * ONE_MB; /* 1GB  system memory supported */
+#endif
+}
+
+
 static void domain_set_resources(device_t dev)
 {
 #if CONFIG_PCI_64BIT_PREF_MEM == 1
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index 5b29042..e3fc8c7 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -67,17 +67,17 @@ config HUDSON_GEC_FWM

config HUDSON_XHCI_FWM_FILE
         string "XHCI firmware path and filename"
-        default "3rdparty/amd/hudson/xhci.bin"
+        default "3rdparty/southbridge/amd/hudson/xhci.bin"
    depends on HUDSON_XHCI_FWM

config HUDSON_IMC_FWM_FILE
         string "IMC firmware path and filename"
-        default "3rdparty/amd/hudson/imc.bin"
+        default "3rdparty/southbridge/amd/hudson/imc.bin"
    depends on HUDSON_IMC_FWM

config HUDSON_GEC_FWM_FILE
         string "GEC firmware path and filename"
-        default "src/southbridge/amd/agesa/hudson/gec.bin"
+        default "3rdparty/southbridge/amd/hudson/gec.bin"
    depends on HUDSON_GEC_FWM

config HUDSON_FWM