hi,
sorry for late
lspci -tvnn :
-[0000:00]-+-00.0 Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host bridge [8086:7190] +-01.0-[0000:01]----00.0 ATI Technologies Inc Rage 128 Pro Ultra TF [1002:5446] +-07.0 Intel Corporation 82371AB/EB/MB PIIX4 ISA [8086:7110] +-07.1 Intel Corporation 82371AB/EB/MB PIIX4 IDE [8086:7111] +-07.2 Intel Corporation 82371AB/EB/MB PIIX4 USB [8086:7112] +-07.3 Intel Corporation 82371AB/EB/MB PIIX4 ACPI [8086:7113] -0c.0 Ensoniq ES1371 [AudioPCI-97] [1274:1371]
superiotool -dV :
superiotool r3293 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Found Winbond W83627HF/F/HG/G (id=0x52, rev=0xf4) at 0x3f0 Register dump: idx 02 07 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f val ff 0b 52 f4 ff fe c0 00 00 00 ff 00 00 00 00 ff def 00 NA 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0c 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 03 02 def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 42 def 01 00 60 00 64 01 0c 80 LDN 0x06 (Consumer IR) idx 30 60 61 70 val 00 00 00 00 def 00 00 00 00 LDN 0x07 (Game port, MIDI port, GPIO 1) idx 30 60 61 62 63 70 f0 f1 f2 val 00 00 00 00 00 00 ff 00 ff def 00 02 01 03 30 09 ff 00 00 LDN 0x08 (GPIO 2, Watchdog timer) idx 30 f0 f1 f2 f3 f5 f6 f6 f7 val 01 00 ff 00 00 ff ff ff ff def 00 ff 00 00 00 00 00 00 00 LDN 0x09 (GPIO 3) idx 30 f0 f1 f2 f3 val 00 ff ff ff ff def 00 ff 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 00 00 00 00 08 00 00 00 00 00 00 8f 37 00 00 00 00 00 00 def 00 00 00 00 NA NA 00 00 00 00 00 00 00 00 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 val 01 ff ff ff ff def 00 00 00 00 00 Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
getpir :
# make
gcc -O2 -D_GNU_SOURCE -DGETPIR -Wall -c -o getpir.o getpir.c gcc -O2 -D_GNU_SOURCE -DGETPIR -Wall -c -o checksum.o checksum.c gcc -O2 -D_GNU_SOURCE -DGETPIR -Wall -c -o code_gen.o code_gen.c gcc -O2 -D_GNU_SOURCE -DGETPIR -Wall -o getpir getpir.o checksum.o code_gen.o ./getpir Probing PIRQ table in memory. Found PCI IRQ routing table signature at 0xfdef0. Validating... checksum is ok. Creating irq_tables.c ... Done, you can move the file to the coreboot tree now. gcc -O2 -D_GNU_SOURCE -DGETPIR -Wall -c -o irq_tables.o irq_tables.c irq_tables.c:42: error: expected identifier or ‘(’ before ‘unsigned’ make: *** [irq_tables.o] Error 1
# ./getpir Probing PIRQ table in memory. Found PCI IRQ routing table signature at 0xfdef0. Validating... checksum is ok. Creating irq_tables.c ... Done, you can move the file to the coreboot tree now.
getpir build with error but it seems generate the file so it is:
cat ~/getpir/irq_tables.c :
/* This file was generated by getpir.c, do not modify! * (but if you do, please run checkpir on it to verify) * * Contains the IRQ Routing Table dumped directly from your * memory, which BIOS sets up. * * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx */
#ifdef GETPIR #include "pirq_routing.h" #else #include <arch/pirq_routing.h> #endif
const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ 32+16*7, /* There can be total 7 devices on the bus */ 0x00, /* Where the interrupt router lies (bus) */ (0x07<<3)|0x0, /* Where the interrupt router lies (dev) */ 0xc20, /* IRQs devoted exclusively to PCI usage */ 0x8086, /* Vendor */ 0x7000, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ 0x44, /* u8 checksum. This has to be set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ {0x00,(0x0a<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0}, {0x00,(0x0e<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x2, 0x0}, {0x00,(0x0b<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x3, 0x0}, {0x00,(0x0c<<3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x4, 0x0}, {0x00,(0x0d<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x5, 0x0}, {0x00,(0x07<<3)|0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0}, {0x00,(0x01<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0}, } };
unsigned long write_pirq_routing_table(unsigned long addr) { return copy_pirq_routing_table(addr); }
Do you have a null-modem cable for debugging and a spare ROM chip you can use for testing coreboot?
i have an old RS-232 serial convertor cabel modem (25-pin to 9-pin) use it for my external modem, can i use it , if can not i will buy one . yes i have spare ROM chip .
thanks .
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Hi,
thanks for the information.
Please try the attached patch for your board, it should at least print something on the serial console and might even boot to a Linux login prompt if you insert 64 MB (or more?) into the first RAM slot.
Apply it with:
$ patch -p0 < v2_atrend_atc_6240.patch
On Wed, May 21, 2008 at 05:37:51AM +0000, shadow . wrote:
Do you have a null-modem cable for debugging and a spare ROM chip you can use for testing coreboot?
i have an old RS-232 serial convertor cabel modem (25-pin to 9-pin) use it for my external modem, can i use it , if can not i will buy one .
Hm, dunno, see here for a picture of a null-modem cable: http://www.coreboot.org/FAQ#Null-modem_cable
Basically you want to connect COM1 (or COM2) on the target PC to COM1 (or COM2) on another PC. You can test your cable by using a terminal program such as minicom on both sides.
The settings are 115200 BAUD, 8 bits, no parity, 1 stop bit.
yes i have spare ROM chip .
Great. Please try to read your original chip's contents first with
$ flashrom -r orig.dd
Then, hot-swap the chips (i.e. insert the empty one), and try to flash your original BIOS image onto it:
$ flashrom -wv orig.dd
If it says VERIFIED, things look ok. Then, try to power-off the machine and restart it with this newly written chip. If that works (i.e. the chip now contains a working and tested copy of your original BIOS) you're fine.
Store away one of the chips somewhere safe now, in order to have a backup when something goes wrong.
For building a coreboot image of your board, first build a payload (usually you want FILO to boot from disk).
Then:
$ cd coreboot-v2/targets $ ./buildtarget a-trend/atc-6240 $ cd a-trend/atc-6240/atc-6240 $ cp ~/filo.elf payload.elf $ make
The coreboot.rom file is your new image which you can flash with flashrom.
HTH, Uwe.
Oops, forgot attachment.
On Wed, May 21, 2008 at 03:14:08PM +0200, Uwe Hermann wrote:
Hi,
thanks for the information.
Please try the attached patch for your board, it should at least print something on the serial console and might even boot to a Linux login prompt if you insert 64 MB (or more?) into the first RAM slot.
Apply it with:
$ patch -p0 < v2_atrend_atc_6240.patch
On Wed, May 21, 2008 at 05:37:51AM +0000, shadow . wrote:
Do you have a null-modem cable for debugging and a spare ROM chip you can use for testing coreboot?
i have an old RS-232 serial convertor cabel modem (25-pin to 9-pin) use it for my external modem, can i use it , if can not i will buy one .
Hm, dunno, see here for a picture of a null-modem cable: http://www.coreboot.org/FAQ#Null-modem_cable
Basically you want to connect COM1 (or COM2) on the target PC to COM1 (or COM2) on another PC. You can test your cable by using a terminal program such as minicom on both sides.
The settings are 115200 BAUD, 8 bits, no parity, 1 stop bit.
yes i have spare ROM chip .
Great. Please try to read your original chip's contents first with
$ flashrom -r orig.dd
Then, hot-swap the chips (i.e. insert the empty one), and try to flash your original BIOS image onto it:
$ flashrom -wv orig.dd
If it says VERIFIED, things look ok. Then, try to power-off the machine and restart it with this newly written chip. If that works (i.e. the chip now contains a working and tested copy of your original BIOS) you're fine.
Store away one of the chips somewhere safe now, in order to have a backup when something goes wrong.
For building a coreboot image of your board, first build a payload (usually you want FILO to boot from disk).
Then:
$ cd coreboot-v2/targets $ ./buildtarget a-trend/atc-6240 $ cd a-trend/atc-6240/atc-6240 $ cp ~/filo.elf payload.elf $ make
The coreboot.rom file is your new image which you can flash with flashrom.
HTH, Uwe.
http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
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-
shadow . -
Uwe Hermann