Sven Schnelle (svens@stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/355
-gerrit
commit b1483129aa5aa6b2f22a6565f75bcdb56772d092 Author: Sven Schnelle svens@stackframe.org Date: Sun Oct 30 09:57:35 2011 +0100
Fix usb debug dongle support
- move enable_usbdebug() declaration to usbdebug.h - reinitialize debug driver in ramstage, as the copying of the data structure from romstage doesn't work right now. This way of copying data from romstage to ramstage is really board/cpu specific, and is likely to break often. So don't do it.
Change-Id: I394678ded6679c1803e29eb691b926182bdcab68 Signed-off-by: Sven Schnelle svens@stackframe.org --- src/console/console.c | 4 ++++ src/console/usbdebug_console.c | 10 +--------- src/include/ehci.h | 3 ++- src/include/usbdebug.h | 5 ++++- src/lib/Makefile.inc | 1 + src/lib/usbdebug.c | 6 +----- src/southbridge/amd/sb600/Makefile.inc | 4 +++- src/southbridge/amd/sb600/sb600.h | 1 - src/southbridge/amd/sb700/Makefile.inc | 4 +++- src/southbridge/amd/sb700/sb700.h | 2 -- src/southbridge/amd/sb800/Makefile.inc | 4 +++- src/southbridge/amd/sb800/sb800.h | 1 - src/southbridge/intel/i82801gx/Makefile.inc | 2 ++ src/southbridge/intel/i82801gx/i82801gx.h | 1 - src/southbridge/nvidia/ck804/Makefile.inc | 4 +++- src/southbridge/nvidia/ck804/ck804.h | 1 - src/southbridge/nvidia/mcp55/Makefile.inc | 4 +++- src/southbridge/nvidia/mcp55/mcp55.h | 1 - src/southbridge/sis/sis966/Makefile.inc | 5 ++++- src/southbridge/sis/sis966/sis966.h | 4 ---- 20 files changed, 34 insertions(+), 33 deletions(-)
diff --git a/src/console/console.c b/src/console/console.c index a73616e..325170d 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -30,6 +30,10 @@ #include <console/ne2k.h> #endif
+#if CONFIG_USBDEBUG +#include <usbdebug.h> +#endif + #ifndef __PRE_RAM__ #include <string.h> #include <pc80/mc146818rtc.h> diff --git a/src/console/usbdebug_console.c b/src/console/usbdebug_console.c index 2270ceb..a624b9d 100644 --- a/src/console/usbdebug_console.c +++ b/src/console/usbdebug_console.c @@ -50,15 +50,7 @@ unsigned get_ehci_debug(void)
static void dbgp_init(void) { - struct ehci_debug_info *dbg_infox; - - /* At this point, all we have to do is copy the fixed address - * debug_info data structure to our version defined above. */ - - dbg_infox = (struct ehci_debug_info *) - ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); - - memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info)); + usbdebug_init(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, &dbg_info); }
static void dbgp_tx_byte(unsigned char data) diff --git a/src/include/ehci.h b/src/include/ehci.h index 4b8c94c..29347f9 100644 --- a/src/include/ehci.h +++ b/src/include/ehci.h @@ -25,6 +25,7 @@
#define EHCI_BAR_INDEX 0x10
+#ifndef __ROMCC__ /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
/* Section 2.2 Host Controller Capability Registers */ @@ -199,5 +200,5 @@ struct ehci_dbg_port { u32 address; #define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) } __attribute__ ((packed)); - +#endif #endif diff --git a/src/include/usbdebug.h b/src/include/usbdebug.h index 281ccde..a7ab21f 100644 --- a/src/include/usbdebug.h +++ b/src/include/usbdebug.h @@ -32,6 +32,8 @@ struct ehci_debug_info { u32 endpoint_in; };
+#ifndef __ROMCC__ +void enable_usbdebug(unsigned int port); int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); void set_ehci_base(unsigned ehci_base); @@ -40,5 +42,6 @@ unsigned get_ehci_debug(void); void set_debug_port(unsigned port); int early_usbdebug_init(void); void usbdebug_tx_byte(unsigned char data); - +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info); +#endif #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index b207ffe..432e24e 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -40,5 +40,6 @@ driver-$(CONFIG_CONSOLE_NE2K) += ne2k.c smm-y += memcpy.c cbfs.c memset.c memcmp.c smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c +smm-$(CONFIG_USBDEBUG) += usbdebug.c
$(obj)/lib/version.ramstage.o : $(obj)/build.h diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index d022d2f..6b75acf 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -238,7 +238,6 @@ int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size) dbg_info->endpoint_in, data, size); }
-#ifdef __PRE_RAM__ static void dbgp_mdelay(int ms) { int i; @@ -356,7 +355,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) }
-static int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) +int usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { struct ehci_caps *ehci_caps; struct ehci_regs *ehci_regs; @@ -566,8 +565,6 @@ next_debug_port: return -10; }
-// **** This part is probably x86 specific and used by romstage.c **** // - int early_usbdebug_init(void) { struct ehci_debug_info *dbg_info = (struct ehci_debug_info *) @@ -588,4 +585,3 @@ void usbdebug_tx_byte(unsigned char data) dbgp_bulk_write_x(dbg_info, (char*)&data, 1); } } -#endif diff --git a/src/southbridge/amd/sb600/Makefile.inc b/src/southbridge/amd/sb600/Makefile.inc index b590361..d7451d2 100644 --- a/src/southbridge/amd/sb600/Makefile.inc +++ b/src/southbridge/amd/sb600/Makefile.inc @@ -8,4 +8,6 @@ driver-y += hda.c driver-y += ac97.c driver-y += pci.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h index 97a7ad2..629f389 100644 --- a/src/southbridge/amd/sb600/sb600.h +++ b/src/southbridge/amd/sb600/sb600.h @@ -40,5 +40,4 @@ void sb600_enable(device_t dev); void sb600_lpc_port80(void); void sb600_pci_port80(void);
-void enable_usbdebug(unsigned int port); #endif /* SB600_H */ diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc index e174e8b..49caedf 100755 --- a/src/southbridge/amd/sb700/Makefile.inc +++ b/src/southbridge/amd/sb700/Makefile.inc @@ -10,7 +10,9 @@ driver-y += pci.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c romstage-y += reset.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c romstage-y += smbus.c diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 794dd96..165c72d 100755 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -82,8 +82,6 @@ int acpi_is_wakeup_early(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
-void enable_usbdebug(unsigned int port); - u32 __attribute__ ((weak)) get_sbdn(u32 bus); void __attribute__((weak)) enable_fid_change_on_sb(u32 sbbusn, u32 sbdn); #endif /* SB700_H */ diff --git a/src/southbridge/amd/sb800/Makefile.inc b/src/southbridge/amd/sb800/Makefile.inc index 7a42fdd..38b7d50 100644 --- a/src/southbridge/amd/sb800/Makefile.inc +++ b/src/southbridge/amd/sb800/Makefile.inc @@ -9,4 +9,6 @@ driver-y += pci.c driver-y += pcie.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h index d7a4a38..ffe7aeb 100644 --- a/src/southbridge/amd/sb800/sb800.h +++ b/src/southbridge/amd/sb800/sb800.h @@ -58,7 +58,6 @@ void sb800_clk_output_48Mhz(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
-void enable_usbdebug(unsigned int port); #else void sb800_enable(device_t dev); void __attribute__((weak)) sb800_setup_sata_phys(struct device *dev); diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index d3a731b..c23a314 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -38,4 +38,6 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += early_smbus.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c +ramstage-$(CONFIG_USBDEBUG) += usb_debug.c +smm-$(CONFIG_USBDEBUG) += usb_debug.c
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 2ceb215..8fb5b92 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -46,7 +46,6 @@ extern void i82801gx_enable(device_t dev); void enable_smbus(void); int smbus_read_byte(unsigned device, unsigned address); #endif -void enable_usbdebug(unsigned int port); #endif
#define MAINBOARD_POWER_OFF 0 diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc index b1577f5..debe227 100644 --- a/src/southbridge/nvidia/ck804/Makefile.inc +++ b/src/southbridge/nvidia/ck804/Makefile.inc @@ -15,7 +15,9 @@ ramstage-y += reset.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
-romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_smbus.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc diff --git a/src/southbridge/nvidia/ck804/ck804.h b/src/southbridge/nvidia/ck804/ck804.h index e7bf021..3e8b1f2 100644 --- a/src/southbridge/nvidia/ck804/ck804.h +++ b/src/southbridge/nvidia/ck804/ck804.h @@ -24,7 +24,6 @@ #include "chip.h"
void ck804_enable(device_t dev); -void enable_usbdebug(unsigned int port);
extern struct pci_operations ck804_pci_ops;
diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index a59e148..26844da 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -15,7 +15,9 @@ driver-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
-romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h index 3173c50..aa52886 100644 --- a/src/southbridge/nvidia/mcp55/mcp55.h +++ b/src/southbridge/nvidia/mcp55/mcp55.h @@ -35,7 +35,6 @@ extern struct pci_operations mcp55_pci_ops; #else #if !defined(__ROMCC__) void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); -void enable_usbdebug(unsigned int port); #endif #endif
diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc index f796047..76dd31a 100644 --- a/src/southbridge/sis/sis966/Makefile.inc +++ b/src/southbridge/sis/sis966/Makefile.inc @@ -9,7 +9,10 @@ driver-y += sata.c driver-y += pcie.c driver-y += aza.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c + +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds diff --git a/src/southbridge/sis/sis966/sis966.h b/src/southbridge/sis/sis966/sis966.h index d6624b3..2c7c7b8 100644 --- a/src/southbridge/sis/sis966/sis966.h +++ b/src/southbridge/sis/sis966/sis966.h @@ -39,8 +39,4 @@ void sis966_enable(device_t dev); #endif
-#if defined(__PRE_RAM__) && !defined(__ROMCC__) -void enable_usbdebug(unsigned int port); -#endif - #endif /* SIS966_H */
-
Sven Schnelle