build service results for r4289

[coreboot information]

Dear coreboot readers!

This is the automatic build system of coreboot.

The developer "vlim" checked in revision 4289 to
the coreboot repository. This caused the following 
changes:

Change Log:
There were a few updates lately that generates ROM size > 512K. I am changing the default ROM size to 1M to accommodate this and future changes. I tested on SimNow family10h_1p.bsd and it POSTs OK.

Signed-off-by: Vincent Lim 
Acked-by: Ronald G. Minnich

Build Log:
Compilation of asus:mew-am is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4289&device=mew-am&...

If something broke during this checkin please be a pain 
in vlim's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

Best regards,
     coreboot automatic build system

Build Error since r4278

[Lim, Vincent]

Hi All:

There is a build error since r4278 on mew-am platform that have not been
fixed until now... I do not have enough knowledge on this platform to
fix this build error, can someone help ?

Best Regards,

Vincent Lim
SimNow Team
Performance CoE
Central Engineering
T 512.602.1618
F 512.602.7745

-----Original Message-----
From: [e-mail]
[mailto:[e-mail]] On Behalf Of coreboot information
Sent: Friday, May 15, 2009 1:22 PM
To: coreboot mailinglist
Subject: [coreboot] build service results for r4289

Dear coreboot readers!

This is the automatic build system of coreboot.

The developer "vlim" checked in revision 4289 to
the coreboot repository. This caused the following 
changes:

Change Log:
There were a few updates lately that generates ROM size > 512K. I am
changing the default ROM size to 1M to accommodate this and future
changes. I tested on SimNow family10h_1p.bsd and it POSTs OK.

Signed-off-by: Vincent Lim 
Acked-by: Ronald G. Minnich

Build Log:
Compilation of asus:mew-am is still broken
See the error log at
http://qa.coreboot.org/log_buildbrd.php?revision=4289&device=mew-am&...
or=asus&num=2

If something broke during this checkin please be a pain 
in vlim's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

Best regards,
     coreboot automatic build system

Build Error since r4278

[Corey Osgood]

I don't have time to fix right now, but see Config.lb in the
src/mainboard/** directory for the mew-vm. You're looking for the
ide0_enable flag, it needs to be added to the same file for the mew-am.

-Corey

On Fri, May 15, 2009 at 3:29 PM, Lim, Vincent  wrote:
> Hi All:
>
> There is a build error since r4278 on mew-am platform that have not been
> fixed until now... I do not have enough knowledge on this platform to
> fix this build error, can someone help ?
>
> Best Regards,
>
> Vincent Lim
> SimNow Team
> Performance CoE
> Central Engineering
> T 512.602.1618
> F 512.602.7745
>
> -----Original Message-----
> From: [e-mail]
> [mailto:[e-mail]] On Behalf Of coreboot information
> Sent: Friday, May 15, 2009 1:22 PM
> To: coreboot mailinglist
> Subject: [coreboot] build service results for r4289
>
> Dear coreboot readers!
>
> This is the automatic build system of coreboot.
>
> The developer "vlim" checked in revision 4289 to
> the coreboot repository. This caused the following
> changes:
>
> Change Log:
> There were a few updates lately that generates ROM size > 512K. I am
> changing the default ROM size to 1M to accommodate this and future
> changes. I tested on SimNow family10h_1p.bsd and it POSTs OK.
>
> Signed-off-by: Vincent Lim 
> Acked-by: Ronald G. Minnich
>
> Build Log:
> Compilation of asus:mew-am is still broken
> See the error log at
> http://qa.coreboot.org/log_buildbrd.php?revision=4289&device=mew-am&...
> or=asus&num=2http://qa.coreboot.org/log_buildbrd.php?revision=4289&device=mew-am&vend%0Aor=asus&num=2
>
> If something broke during this checkin please be a pain
> in vlim's neck until the issue is fixed.
>
> If this issue is not fixed within 24h the revision should
> be backed out.
>
> Best regards,
>     coreboot automatic build system

Build Error since r4278

[ron minnich]

On Fri, May 15, 2009 at 12:42 PM, Corey Osgood  wrote:
> I don't have time to fix right now, but see Config.lb in the
> src/mainboard/** directory for the mew-vm. You're looking for the
> ide0_enable flag, it needs to be added to the same file for the mew-am.

actually, it needs to be removed; support for selective ide disable
was removed from the southbridge (I don't know why).

Try this:
Index: src/mainboard/asus/mew-am/Config.lb
===================================================================
--- src/mainboard/asus/mew-am/Config.lb	(revision 4289)
+++ src/mainboard/asus/mew-am/Config.lb	(working copy)
@@ -126,8 +126,6 @@
       device pci 1f.3 on end		# SMbus
       device pci 1f.5 off end		# AC'97 audio (N/A, uses CS4280 chip)
       device pci 1f.6 off end		# AC'97 modem (N/A)
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
     end
   end
 end

Build Error since r4278

[Myles Watson]

> Try this:
> Index: src/mainboard/asus/mew-am/Config.lb
> ===================================================================
> --- src/mainboard/asus/mew-am/Config.lb (revision 4289)
> +++ src/mainboard/asus/mew-am/Config.lb (working copy)
> @@ -126,8 +126,6 @@
>       device pci 1f.3 on end           # SMbus
>       device pci 1f.5 off end          # AC'97 audio (N/A, uses CS4280 chip)
>       device pci 1f.6 off end          # AC'97 modem (N/A)
> register "ide0_enable" = "1"
> register "ide1_enable" = "1"
>
> end
>   end
>  end

Yes.  That fixes it.  I think Joseph was waiting for Uwe's response to
whether or not he could remove them:
> static.c:133: error: unknown field 'ide0_enable' specified in initializer
> static.c:134: error: unknown field 'ide1_enable' specified in initializer
> make[1]: *** [static.o] Error 1

...
> Uwe can we remove these from your Config.lb, I don't think they do
> anything do they?

Build Error since r4278

[Uwe Hermann]

On Fri, May 15, 2009 at 01:57:15PM -0600, Myles Watson wrote:
> > Try this:
> > Index: src/mainboard/asus/mew-am/Config.lb
> > ===================================================================
> > --- src/mainboard/asus/mew-am/Config.lb (revision 4289)
> > +++ src/mainboard/asus/mew-am/Config.lb (working copy)
> > @@ -126,8 +126,6 @@
> >       device pci 1f.3 on end           # SMbus
> >       device pci 1f.5 off end          # AC'97 audio (N/A, uses CS4280 chip)
> >       device pci 1f.6 off end          # AC'97 modem (N/A)
> > register "ide0_enable" = "1"
> > register "ide1_enable" = "1"
> >
> > end
> >   end
> >  end
>
> Yes.  That fixes it.  I think Joseph was waiting for Uwe's response to
> whether or not he could remove them:

I'll fix the code to actually _honor_ those variables properly instead
of hardcode the behaviour, unless Joseph beats me to it.

Uwe.

Build Error since r4278

[Myles Watson]

On Fri, May 15, 2009 at 2:04 PM, Uwe Hermann  wrote:
> On Fri, May 15, 2009 at 01:57:15PM -0600, Myles Watson wrote:
> > > Try this:
> > > Index: src/mainboard/asus/mew-am/Config.lb
> > > ===================================================================
> > > --- src/mainboard/asus/mew-am/Config.lb (revision 4289)
> > > +++ src/mainboard/asus/mew-am/Config.lb (working copy)
> > > @@ -126,8 +126,6 @@
> > >       device pci 1f.3 on end           # SMbus
> > >       device pci 1f.5 off end          # AC'97 audio (N/A, uses CS4280 chip)
> > >       device pci 1f.6 off end          # AC'97 modem (N/A)
> > > register "ide0_enable" = "1"
> > > register "ide1_enable" = "1"
> I'll fix the code to actually _honor_ those variables properly instead
> of hardcode the behaviour, unless Joseph beats me to it.

Since there are no occurrences of ide._enable in the i82801xx
directory, lets remove the two lines until its implemented so that it
builds.

Thanks,
Myles

Build Error since r4278

[ron minnich]

another option (not at all tested, mind you; probably not quite right).

Index: src/southbridge/intel/i82801xx/chip.h
===================================================================
--- src/southbridge/intel/i82801xx/chip.h       (revision 4289)
+++ src/southbridge/intel/i82801xx/chip.h       (working copy)
@@ -43,7 +43,9 @@
        uint8_t pirqf_routing;
        uint8_t pirqg_routing;
        uint8_t pirqh_routing;
-};
+       uint8_t ide0_enable;
+       uint8_t ide1_enable;
+}

extern struct chip_operations southbridge_intel_i82801xx_ops;

Index: src/southbridge/intel/i82801xx/i82801xx_ide.c
===================================================================
--- src/southbridge/intel/i82801xx/i82801xx_ide.c       (revision 4289)
+++ src/southbridge/intel/i82801xx/i82801xx_ide.c       (working copy)
@@ -29,11 +29,12 @@

static void ide_init(struct device *dev)
 {
+       struct southbridge_intel_i82801xx_config *config = dev->chip_info;
        /* TODO: Needs to be tested for compatibility with ICH5(R). */
        /* Enable IDE devices so the Linux IDE driver will work. */
        uint16_t ideTimingConfig;
-       int enable_primary = 1;
-       int enable_secondary = 1;
+       int enable_primary = config->ide0_enable;
+       int enable_secondary = config->ide1_enable;

ideTimingConfig = pci_read_config16(dev, IDE_TIM_PRI);
        ideTimingConfig &= ~IDE_DECODE_ENABLE;

Build Error since r4278

[Joseph Smith]

On Fri, 15 May 2009 14:25:54 -0700, ron minnich  wrote:
> another option (not at all tested, mind you; probably not quite right).
> Index: src/southbridge/intel/i82801xx/chip.h
>
> --- src/southbridge/intel/i82801xx/chip.h       (revision 4289)
> +++ src/southbridge/intel/i82801xx/chip.h       (working copy)
> @@ -43,7 +43,9 @@
>         uint8_t pirqf_routing;
>         uint8_t pirqg_routing;
>         uint8_t pirqh_routing;
> -};
>   uint8_t ide0_enable;
>   uint8_t ide1_enable;
>
> +}
>
> extern struct chip_operations southbridge_intel_i82801xx_ops;
> Index: src/southbridge/intel/i82801xx/i82801xx_ide.c
>
> --- src/southbridge/intel/i82801xx/i82801xx_ide.c       (revision 4289)
> +++ src/southbridge/intel/i82801xx/i82801xx_ide.c       (working copy)
> @@ -29,11 +29,12 @@
>
> static void ide_init(struct device *dev)
>  {
>   struct southbridge_intel_i82801xx_config *config =

dev->chip_info;
>     /* TODO: Needs to be tested for compatibility with ICH5(R). */
>     /* Enable IDE devices so the Linux IDE driver will work. */
>     uint16_t ideTimingConfig;
>   int enable_primary = 1;
>   int enable_secondary = 1;
>   int enable_primary = config->ide0_enable;
>   int enable_secondary = config->ide1_enable;
>
>   ideTimingConfig = pci_read_config16(dev, IDE_TIM_PRI);
>   ideTimingConfig &= ~IDE_DECODE_ENABLE;

yup something like that. But enable_primary and enable_secondary are
misleading and we would like to completely change them. Also we would want
the defaults to be "1" for those boards where ide0_enable and ide1_enable
is not specified.

Build Error since r4278

[ron minnich]

On Fri, May 15, 2009 at 3:48 PM, Joseph Smith  wrote:
> yup something like that. But enable_primary and enable_secondary are
> misleading and we would like to completely change them. Also we would want
> the defaults to be "1" for those boards where ide0_enable and ide1_enable
> is not specified.

We call that "the DTS". We've never had that capability in the config
tool. Unless somebody did something when I was not looking.

ron

Build Error since r4278

[Joseph Smith]

On Fri, 15 May 2009 16:01:16 -0700, ron minnich  wrote:
> On Fri, May 15, 2009 at 3:48 PM, Joseph Smith

wrote:
> > yup something like that. But enable_primary and enable_secondary are
> > misleading and we would like to completely change them. Also we would
>
> want
> > the defaults to be "1" for those boards where ide0_enable and
>
> ide1_enable
> > is not specified.
>
> We call that "the DTS". We've never had that capability in the config
> tool. Unless somebody did something when I was not looking.

DTS that's v3 right? What config tool?

Build Error since r4278

[ron minnich]

On Fri, May 15, 2009 at 4:03 PM, Joseph Smith  wrote:
> > We call that "the DTS". We've never had that capability in the config
> > tool. Unless somebody did something when I was not looking.
>
> DTS that's v3 right?

yes.
> What config tool?

the v2 config tool. There has never been a way to specify default
values for things in chip.h

ron

Build Error since r4278

[Joseph Smith]

On Fri, 15 May 2009 16:25:02 -0700, ron minnich  wrote:
> On Fri, May 15, 2009 at 4:03 PM, Joseph Smith

wrote:
> > > We call that "the DTS". We've never had that capability in the config
> > > tool. Unless somebody did something when I was not looking.
> >
> > DTS that's v3 right?
>
> yes.
> > What config tool?
>
> the v2 config tool. There has never been a way to specify default
> values for things in chip.h

The default value is going to be specified in i82801xx_ide.c

Build Error since r4278

[ron minnich]

On Fri, May 15, 2009 at 4:28 PM, Joseph Smith  wrote:
> The default value is going to be specified in i82801xx_ide.c

how do you plan to determine how to use the default value?

rno

Build Error since r4278

[Joseph Smith]

On Fri, 15 May 2009 16:41:38 -0700, ron minnich  wrote:
> On Fri, May 15, 2009 at 4:28 PM, Joseph Smith

wrote:
> > The default value is going to be specified in i82801xx_ide.c
>
> how do you plan to determine how to use the default value?
>
> rno

You'll see rno :-)

Build Error since r4278

[ron minnich]

On Fri, May 15, 2009 at 4:44 PM, Joseph Smith  wrote:
> You'll see rno :-)

ok, just run it by me soon, want to make sure you don't go down a black hole :-)

nor

Build Error since r4278

[Joseph Smith]

On Fri, 15 May 2009 16:41:38 -0700, ron minnich  wrote:
> On Fri, May 15, 2009 at 4:28 PM, Joseph Smith

wrote:
> > The default value is going to be specified in i82801xx_ide.c
>
> how do you plan to determine how to use the default value?

Hello rno (just picking fun for you spelling your name wrong :-)),
Your right. It would be easy to make enabled default if both values
(enabled and disabled) were non 0's. But with disabled being a value of 0
there is not really another way except to specify it in all the mainboard
Config.lb's. I have a patch I just haven't the time to test it right now.
Will do later this evening and submit to list for Ack.

Build Error since r4278

[Russell Whitaker]

On Fri, 15 May 2009, Joseph Smith wrote:
> On Fri, 15 May 2009 14:25:54 -0700, ron minnich  wrote:
> > another option (not at all tested, mind you; probably not quite right).
> > Index: src/southbridge/intel/i82801xx/chip.h
> >
> > --- src/southbridge/intel/i82801xx/chip.h       (revision 4289)
> > +++ src/southbridge/intel/i82801xx/chip.h       (working copy)
> > @@ -43,7 +43,9 @@
> >         uint8_t pirqf_routing;
> >         uint8_t pirqg_routing;
> >         uint8_t pirqh_routing;
> > -};
> >   uint8_t ide0_enable;
> >   uint8_t ide1_enable;
> >
> > +}
> >
> > extern struct chip_operations southbridge_intel_i82801xx_ops;
> > Index: src/southbridge/intel/i82801xx/i82801xx_ide.c
> >
> > --- src/southbridge/intel/i82801xx/i82801xx_ide.c       (revision 4289)
> > +++ src/southbridge/intel/i82801xx/i82801xx_ide.c       (working copy)
> > @@ -29,11 +29,12 @@
> >
> > static void ide_init(struct device *dev)
> >  {
> >   struct southbridge_intel_i82801xx_config *config =
>
> dev->chip_info;
> >     /* TODO: Needs to be tested for compatibility with ICH5(R). */
> >     /* Enable IDE devices so the Linux IDE driver will work. */
> >     uint16_t ideTimingConfig;
> >   int enable_primary = 1;
> >   int enable_secondary = 1;
> >   int enable_primary = config->ide0_enable;
> >   int enable_secondary = config->ide1_enable;
> >
> >   ideTimingConfig = pci_read_config16(dev, IDE_TIM_PRI);
> >   ideTimingConfig &= ~IDE_DECODE_ENABLE;
>
> yup something like that. But enable_primary and enable_secondary are
> misleading and we would like to completely change them. Also we would want
> the defaults to be "1" for those boards where ide0_enable and ide1_enable
> is not specified.

In the long run would there be less confusion if the terms were 
ide0_disable and ide1_disable so that if they are not specified
the defaults would be "0" ?

Just a thought
    Russ

Build Error since r4278

[ron minnich]

On Fri, May 15, 2009 at 6:47 PM, Russell Whitaker  wrote:
> In the long run would there be less confusion if the terms were ide0_disable
> and ide1_disable so that if they are not specified
> the defaults would be "0" ?

sure. But you have to fix a few things.

as currently implemented in 82801xx it defaults to 1:
static void ide_init(struct device *dev)
{
        /* TODO: Needs to be tested for compatibility with ICH5(R). */
        /* Enable IDE devices so the Linux IDE driver will work. */
        uint16_t ideTimingConfig;
        int enable_primary = 1;
        int enable_secondary = 1;

If we go with the southbridge_intel_i82801xx_config approach, it will
default to 0 in all mainboards that don't specifically set the values
in the mainboard Config.lb.

So fixing this is a two-step process: fix the
src/southbridge/intel/i82801xx/chip.h and add those two elements to
the struct.
And fix these Config.lb:
src/mainboard/asus/mew-am/Config.lb
src/mainboard/asus/mew-vm/Config.lb
src/mainboard/msi/ms6178/Config.lb
src/mainboard/nec/powermate2000/Config.lb
src/mainboard/rca/rm4100/Config.lb
src/mainboard/thomson/ip1000/Config.lb

so that they set the values as follows:
src/mainboard/asus/mew-am/Config.lb:      register "ide0_enable" = "1"
src/mainboard/asus/mew-am/Config.lb:      register "ide1_enable" = "1"

if this makes no sense let me know.

ron

Build Error since r4278

[Joseph Smith]

On Fri, 15 May 2009 22:04:41 +0200, Uwe Hermann  wrote:
> On Fri, May 15, 2009 at 01:57:15PM -0600, Myles Watson wrote:
> > > Try this:
> > > Index: src/mainboard/asus/mew-am/Config.lb
> > > ===================================================================
> > > --- src/mainboard/asus/mew-am/Config.lb (revision 4289)
> > > +++ src/mainboard/asus/mew-am/Config.lb (working copy)
> > > @@ -126,8 +126,6 @@
> > >       device pci 1f.3 on end           # SMbus
> > >       device pci 1f.5 off end          # AC'97 audio (N/A,
>
> uses CS4280 chip)
> > > device pci 1f.6 off end          # AC'97 modem (N/A)
> > > register "ide0_enable" = "1"
> > > register "ide1_enable" = "1"
> > >
> > > end
> > >   end
> > >  end
> >
> > Yes.  That fixes it.  I think Joseph was waiting for Uwe's response to
> > whether or not he could remove them:
>
> I'll fix the code to actually _honor_ those variables properly instead
> of hardcode the behaviour, unless Joseph beats me to it.

Yes, this was a result of setting up the PIRQ's to be defined on mainboard
basis. It is looking for ide0_enable and ide1_enable in the
src/southbridge/intel/i82801xx/chip.h struct. We could just add them to
make the mew-am build with out an error, but I have discussed a proper fix
with Uwe. I was hoping to get to it today (nope), and I am going away for
the weekend so I will fix it on Monday unless Uwe beats me to it :-)