RE: Board hangs after soft_reset() in auto.c

[YhLu]

It seems that you only have one CPU. Then without ht_optimize_link in
in_conherent.c  you even don't need to do soft_reset.

What's the value in you resource_map.c?

You need update that to

PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD 8131/8111 on
link0 of CPU 0
    PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x09070003, // AMD 8131 on link1
of CPU 0
    PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x0c0a0003, // AMD 8131 on link2
of CPU 0
    PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,

In the auto.c

static const struct ht_chain ht_c[] = {
                { /* Link 0 of CPU0 */
                        .devreg = 0xe0,  /* Preset bus num in resource map
*/
                },      
                { /* Link 1 of CPU0 */
                        .devreg = 0xe4,  /* Preset bus num in resource map
*/
                },      
                { /* Link 2 of CPU0 */
                        .devreg = 0xe8,  /* Preset bus num in resource map
*/
                },      
        };

Regards

YH

-----Original Message-----
From: Liu Tao [mailto:[e-mail]] 
Sent: Thursday, November 04, 2004 6:11 PM
To: Eric W. Biederman
Cc: LinuxBIOS
Subject: Re: Board hangs after soft_reset() in auto.c

Thanks, after remove the ht_optimize_link() in ht_setup_chainx()
the board soft resets OK.

Eric W. Biederman wrote:
> The short answer is that optimizing the hypertransport speed and frequency
> is an optimization.  So you can disable the reset and see how far you

board
> gets otherwise.  That should give you a little more time to debug the

reset path.
>

Regards,
Liu Tao
_______________________________________________
Linuxbios mailing list
[e-mail]
http://www.clustermatic.org/mailman/listinfo/linuxbios

Board hangs after soft_reset() in auto.c

[Liu Tao]

I was using the old .upos version ht_c[] and misconfigured the upos value,
after fixed the value soft resets OK with ht_optimize_link(). Another
needs_reset request comes from apply_cpu_errata_fixes().

Regards,
Liu Tao

YhLu wrote:
> It seems that you only have one CPU. Then without ht_optimize_link in
> in_conherent.c  you even don't need to do soft_reset.
>
> What's the value in you resource_map.c?
>
> You need update that to
>
> PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD

8131/8111 on
> link0 of CPU 0
>    PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x09070003, // AMD 8131 on

link1
> of CPU 0
>    PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x0c0a0003, // AMD 8131 on

link2
> of CPU 0
>    PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
>
> In the auto.c
>    static const struct ht_chain ht_c[] = {
>            { /* Link 0 of CPU0 */
>                    .devreg = 0xe0,  /* Preset bus num in resource map
>
> */
>                },   
>                { /* Link 1 of CPU0 */
>                        .devreg = 0xe4,  /* Preset bus num in resource map
> */
>                },   
>                { /* Link 2 of CPU0 */
>                        .devreg = 0xe8,  /* Preset bus num in resource map
> */
>                },   
>        };

Board hangs after soft_reset() in auto.c

[Liu Tao]

Can this cause configuration regions overlap with each other during
device enumeration? In amdk8_scan_chains() the subordinate/limit field of
current register is set to 0xff before hypertransport_scan_chain(),
while other following registers are not touched yet, so they overlay with
current register?

Regards,
Liu Tao
> PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD

8131/8111 on
> link0 of CPU 0
>    PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x09070003, // AMD 8131 on

link1
> of CPU 0
>    PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x0c0a0003, // AMD 8131 on

link2
> of CPU 0
>    PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,