Re: [coreboot] Strange Coreboot behaviors while building IVB Cougar Canyon Coreboot based upon intel.com/fsp IVB FSP

[Patrick Georgi]

Am Freitag, den 10.01.2014, 14:26 +0000 schrieb Stojsavljevic, Zoran:
> cpu_microcode_blob.bin         0x76ffc0   microcode    0 <<===== NO microcode!!!

Please try http://review.coreboot.org/#/c/4646/
I can't completely verify it without downloading FSP, but it improves
things in my tests.

Regards,
Patrick

Strange Coreboot behaviors while building IVB Cougar Canyon Coreboot based upon intel.com/fsp IVB FSP

[Stojsavljevic, Zoran]

Hello Patrick,

I exactly did what you have suggested in this patch: http://review.coreboot.org/#/c/4646/

Removed the compile condition (using Coreboot v4.0-5223, SeaBIOS 1.7.4.9 snapshots). I introduced all microcodes from www.intel.com/fsp -> IVB package in:
src/cpu/intel/fsp_model_206ax/

Then I have changed microcode_blob.h to the one, shown in the log, presented at the end of this email.

All Cool, I have working FSP + Coreboot v4.0-5223 + SeaBIOS 1.7.4.9, which says that your patch is verified! Way To Go!

Thank you,
Zoran
_______
Most of The Time you should be “intel inside” to be capable to think “out of the box”.

Log:
/home/zoran/projects/coreboot/coreboot-v4.0-5223
[zoran@localhost coreboot-v4.0-5223]$ cd src/cpu/intel/fsp_model_206ax/
[zoran@localhost fsp_model_206ax]$ ls -al
total 312
drwxrwxr-x.  3 zoran zoran  4096 Jan 13 13:06 .
drwxrwxr-x. 45 zoran zoran  4096 Jan 10 13:54 ..
drwxrwxr-x.  2 zoran zoran  4096 Jan 10 13:54 acpi
-rw-rw-r--.  1 zoran zoran  9490 Jan 10 13:54 acpi.c
-rw-rw-r--.  1 zoran zoran   967 Jan 10 13:54 bootblock.c
-rw-rw-r--.  1 zoran zoran  6838 Jan 10 13:54 cache_as_ram.inc
-rw-rw-r--.  1 zoran zoran  1379 Jan 10 13:54 chip.h
-rw-rw-r--.  1 zoran zoran  2022 Jan 10 13:54 finalize.c
-rw-rw-r--.  1 zoran zoran  2700 Jan 10 13:54 Kconfig
-rw-rw-r--.  1 zoran zoran   343 Jan 10 13:54 Makefile.inc
-rw-rw-r--.  1 zoran zoran   847 Jan 13 12:51 microcode_blob.c
-rw-rw-r--.  1 zoran zoran  1366 Jan 13 13:06 microcode_blob.h
-rw-rw-r--.  1 zoran zoran 29422 Jan 13 12:56 microcode-m12206a7_00000028.h
-rw-r--r--.  1 zoran zoran 28452 Jan 10 11:57 microcode-m12306a2_00000008.h
-rw-r--r--.  1 zoran zoran 31752 Jan 10 11:57 microcode-m12306a4_00000007.h
-rw-r--r--.  1 zoran zoran 31781 Jan 10 11:57 microcode-m12306a5_00000007.h
-rw-r--r--.  1 zoran zoran 35110 Jan 10 11:57 microcode-m12306a8_00000010.h
-rw-rw-r--.  1 zoran zoran 35566 Jan 13 12:56 microcode-m12306a9_00000017.h
-rw-r--r--.  1 zoran zoran 38637 Jan 10 11:57 microcode-m12306a9_00000019.h
-rw-rw-r--.  1 zoran zoran  3616 Jan 10 13:54 model_206ax.h
-rw-rw-r--.  1 zoran zoran 10336 Jan 10 13:54 model_206ax_init.c
[zoran@localhost fsp_model_206ax]$ 
[zoran@localhost fsp_model_206ax]$ 
[zoran@localhost fsp_model_206ax]$ 
[zoran@localhost fsp_model_206ax]$ cat microcode_blob.h

[snap]

#if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_206AX)
        /* Size is 0x2800 - Update in Kconfigs when any included file changes*/
        #include <microcode-m12206a7_00000029.h>
#endif

#if IS_ENABLED(CONFIG_CPU_INTEL_FSP_MODEL_306AX)
        /* Size is 0xC000 - Update in Kconfigs when any included file changes*/
        #include "microcode-m12306a2_00000008.h"
        #include "microcode-m12306a4_00000007.h"
        #include "microcode-m12306a5_00000007.h"
        #include "microcode-m12306a8_00000010.h"
        #include "microcode-m12306a9_00000017.h"
        #include "microcode-m12306a9_00000019.h"
#endif
[zoran@localhost fsp_model_206ax]$

-----Original Message-----
From: Patrick Georgi [mailto:[e-mail]] 
Sent: Friday, January 10, 2014 8:04 PM
To: Stojsavljevic, Zoran
Cc: [e-mail]
Subject: Re: [coreboot] Strange Coreboot behaviors while building IVB Cougar Canyon Coreboot based upon intel.com/fsp IVB FSP

Am Freitag, den 10.01.2014, 14:26 +0000 schrieb Stojsavljevic, Zoran:
> cpu_microcode_blob.bin         0x76ffc0   microcode    0 <<===== NO microcode!!!

Please try http://review.coreboot.org/#/c/4646/
I can't completely verify it without downloading FSP, but it improves things in my tests.

Regards,
Patrick

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