Signed-off-by: Robinson P. Tryon bishop.robinson@gmail.com
Notes: - Added in the missing tab chars manually (I'm still trying to get emacs to follow the correct indenting rules). - Managed to finish up before 1AM, so my proofing should be better this time... :-) - What should I do with registers 0x25, 0x26 in the 'Global Configuration Registers' table? They both have an LDN of "All-05h", so should they go with the 0x5 GPIO table or in the GCR table? (I took a guess and put them in the former).
On 04.10.2007 20:54, Robinson Tryon wrote:
Signed-off-by: Robinson P. Tryon bishop.robinson@gmail.com
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Notes:
- Added in the missing tab chars manually (I'm still trying to get
emacs to follow the correct indenting rules).
- Managed to finish up before 1AM, so my proofing should be better
this time... :-)
- What should I do with registers 0x25, 0x26 in the 'Global
Configuration Registers' table? They both have an LDN of "All-05h", so should they go with the 0x5 GPIO table or in the GCR table? (I took a guess and put them in the former).
You made the right decision.
Index: ite.c
--- ite.c (revision 2823) +++ ite.c (working copy) @@ -28,6 +28,39 @@
/* Note: IT8726F has ID 0x8726 (datasheet wrongly says 0x8716). */ const static struct superio_registers reg_table[] = {
- {0x8661, "IT8661F", {
{NOLDN, NULL,
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x20,0x21,
0x22,0x23,0x24,EOT},
{NANA,NANA,NANA,NANA,NANA,NANA,0x00,NANA,0x86,0x61,
0x00,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x31,0x60,0x61,0x70,0x71,0x74,0xf0,EOT},
{0x00,0x00,0x03,0xf0,0x06,0x02,0x02,0x00,EOT}},
{0x1, "COM1",
{0x30,0x31,0x60,0x61,0x70,0x71,0xf0,EOT},
{0x00,0x00,0x03,0xf8,0x04,0x02,0x00,EOT}},
{0x2, "COM2",
{0x30,0x31,0x60,0x61,0x70,0x71,0xf0,EOT},
{0x00,0x00,0x02,0xf8,0x03,0x02,0x00,EOT}},
{0x3, "Parallel port",
{0x30,0x31,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0xf0,
EOT},
{0x00,0x00,0x03,0x78,0x07,0x78,0x07,0x02,0x03,0x03,
EOT}},
{0x4, "IR",
{0x30,0x31,0x60,0x61,0x62,0x63,0x70,0x71,0x72,0x73,
0x74,0x75,0xf0,EOT},
{0x00,0x00,0x02,0xe8,0x03,0x00,0x0a,0x02,0x0b,0x02,
0x01,0x00,0x00,EOT}},
{0x5, "GPIO",
{0x25,0x26,0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,
0x70,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
0xf9,0xfa,0xfb,0xfc,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,EOT}},
{0x8702, "IT8702F", { {EOT}}}, {0x8705, "IT8705F/AF or IT8700F", {{EOT}}},
On Fri, Oct 05, 2007 at 12:40:48PM +0200, Carl-Daniel Hailfinger wrote:
On 04.10.2007 20:54, Robinson Tryon wrote:
Signed-off-by: Robinson P. Tryon bishop.robinson@gmail.com
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Yep, looks good, r2825.
However, this chip will not yet be detected (needs different init sequence). I'll fix that later if nobody beats me to it.
Uwe.