Patch set updated for coreboot: 86270fd agesa fam15 northbridge: change lapic_id to accommodate two CPUs

[Siyuan Wang]

Siyuan Wang ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1498

-gerrit

commit 86270fd109e0e475e0d2db74aa34aed92a72cd7b
Author: Siyuan Wang 
Date:   Fri Sep 7 19:03:24 2012 +0800

agesa fam15 northbridge: change lapic_id to accommodate two CPUs

According to http://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/vendorcode/amd... line 273,
    adjust apic id to accommodate two CPUs.
    The Tyan S8226 has two CPU sockets, and the current code just finds one CPU's cores.
    we adjust apic_id in cpu_bus_scan so as to find all CPUs.

Change-Id: Ib3263fc6f5508f744b81e8e388fde9ccd9b51851
    Signed-off-by: Siyuan Wang 
    Signed-off-by: Siyuan Wang 
---
 src/northbridge/amd/agesa/family15/northbridge.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index da67af4..c4fc6a8 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -1047,7 +1047,6 @@ static u32 cpu_bus_scan(device_t dev, u32 max)

for (j = 0; j <= siblings; j++ ) {
    		extern CONST OPTIONS_CONFIG_TOPOLOGY ROMDATA TopologyConfiguration;
-			u32 modules = TopologyConfiguration.PlatformNumberOfModules;
    		u32 lapicid_start = 0;

/*
@@ -1071,7 +1070,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
    			lapicid_start = (lapicid_start + 1) * core_max;
    			printk(BIOS_SPEW, "lpaicid_start=0x%x ", lapicid_start);
    		}
-			u32 apic_id = (lapicid_start * (i/modules + 1)) + ((i % modules) ? (j + (siblings + 1)) : j);
+			u32 apic_id = (i * core_max) + j + lapicid_start;
    		printk(BIOS_SPEW, "node 0x%x core 0x%x apicid=0x%x\n",
    				i, j, apic_id);