Dear coreboot readers!
This is the automated build check service of coreboot.
The developer "mjones" checked in revision 3594 to the coreboot source repository and caused the following changes:
Change Log: The AMD dbm690t mainboard uses the it8712f SIO with the default 48MHz clock input. The Asus a8n_e uses the it8712f with a 24MHz clock input. The it8712f early init code was setting a 24MHz input clock(to support the a8n_e). Since 48Mhz is the default I added a function to set 24MHz input clock to the a8n_e.
Signed-off-by: Marc Jones marc.jones@amd.com Acked-by: Rudolf Marek r.marek@assembler.cz
Build Log: Compilation of amd:dbm690t is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3594&device=dbm690t&... Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3594&device=j7f24&v... Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3594&device=epia-cn&...
If something broke during this checkin please be a pain in mjones's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should be backed out.
Best regards, coreboot automatic build system
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