On 4/9/2015 1:21 PM, Duncan Laurie wrote:
[I got a bounce when sending this so trying again]
I think you should be able to alter the behavior with the 0xf2 and 0xf4 registers in the LDN4 block.
Right now mainboard/google/panther/devicetree.cb has this:
device pnp 2e.4 on # Environment Controller io 0x60 = 0x700 io 0x62 = 0x710 irq 0x70 = 0x09 irq 0xf2 = 0x20 <<<<< PCR 1 irq 0xf4 = 0x0 <<<<< PCR 2 irq 0xfa = 0x12 end
0xf2 bit 5 and 0xf4 bit 5,6 should have some effect on this behavior.
F4<5> and F2<5>: 1 X : Always ON 0 1 : Memory 0 0 : Always OFF
And then F4<6> seems to be the bit that gates the PWRON pulse from the superio and lets the southbridge control the default behavior.
I think if you set "irq 0xf2 = 0x20" (in theory if the datasheet is right F2<5> doesn't matter for always on) and "irq 0xf4 = 0x20" and then do not call it8772f_ac_resume_southbridge() (which is setting 0xf4=0x60) it should let the superio control the behavior and always power on when AC Is attached.
that seems to have done the trick, thanks! I was misunderstanding the functionality of F4<5>, appreciate the clarification
One other thing to try is to remove the RTC battery and let it reset the superio state after you have things configured as desired.
didn't have to do this, just powered off fully after flashing
-duncan
On Thu, Apr 9, 2015 at 10:15 AM, Matt DeVillier <matt.devillier@gmail.com mailto:matt.devillier@gmail.com> wrote:
Duncan, took a look at the IT8772F data sheet (well, 8712, closest I could find: http://www.hardwaresecrets.com/datasheets/it8712f.pdf ) and it seems that there's no setting of the PCR1/2 registers that will force #PSON high when AC power is applied - it's always conditional on the previous system power state. I'd be happy for someone else to take a look and tell me I'm misreading though :) cheers, Matt On 3/26/2015 5:21 PM, Matt DeVillier wrote:
On 3/26/2015 9:49 AM, Duncan Laurie wrote:
On Wed, Mar 25, 2015 at 11:35 PM, Matt DeVillier <matt.devillier@gmail.com <mailto:matt.devillier@gmail.com>> wrote: Greetings all! I was wondering if it's possible to have Panther (Asus ChromeBox - Haswell/Lynxpoint) power on when AC power connected regardless of the previous power state. Currently, the box will power on if AC power is lost and the device was powered on, but not if powered off. I have a use case where it would be convenient to be able to power on the boxes by toggling AC power (eg, the boxes are not within physical reach). I modified the CMOS default setting for 'power_on_after_fail' to be enabled and verified its status with nvramtool. I also tried modifying lpc.c/smihandler.c in the southbridge code to force MAINBOARD_POWER_ON (rather than MAINBOARD_POWER_KEEP) in all cases, to no avail. Am I approaching this from the wrong angle, or is it perhaps not possible with these boxes? This might be due to the SuperIO instead of the Southbridge. Panther does call it8772f_ac_resume_southbridge() which *should* be making the southbridge the one responsible for the power behavior when AC is applied, but as a first test you could try removing that call to see if the default SuperIO behavior is closer to what you want.
Hi Duncan, I tried removing the call as suggested, but it didn't change the behavior at all. Any thoughts as to where to look next? thanks! -Matt
-duncan
Dear Matt, dear Duncan,
Am Donnerstag, den 09.04.2015, 18:11 -0500 schrieb Matt DeVillier:
On 4/9/2015 1:21 PM, Duncan Laurie wrote:
[I got a bounce when sending this so trying again]
I think you should be able to alter the behavior with the 0xf2 and 0xf4 registers in the LDN4 block.
Right now mainboard/google/panther/devicetree.cb has this:
device pnp 2e.4 on # Environment Controller io 0x60 = 0x700 io 0x62 = 0x710 irq 0x70 = 0x09 irq 0xf2 = 0x20 <<<<< PCR 1 irq 0xf4 = 0x0 <<<<< PCR 2 irq 0xfa = 0x12 end
0xf2 bit 5 and 0xf4 bit 5,6 should have some effect on this behavior.
F4<5> and F2<5>: 1 X : Always ON 0 1 : Memory 0 0 : Always OFF
And then F4<6> seems to be the bit that gates the PWRON pulse from the superio and lets the southbridge control the default behavior.
I think if you set "irq 0xf2 = 0x20" (in theory if the datasheet is right F2<5> doesn't matter for always on) and "irq 0xf4 = 0x20" and then do not call it8772f_ac_resume_southbridge() (which is setting 0xf4=0x60) it should let the superio control the behavior and always power on when AC Is attached.
that seems to have done the trick, thanks! I was misunderstanding the functionality of F4<5>, appreciate the clarification
Duncan, thank you for the analysis and solution.
Matt, are you planning to write a proper change set to make this run-time configurable using the user option table (NVRAM)? That’d be great!
[…]
Thanks,
Paul