Patch set updated for coreboot: cf271c1 SB800 RAID: add kconfig option RAID_MISC_ROM_POSITION

[Kerry Sheh]

Kerry Sheh ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/249

-gerrit

commit cf271c1a7851527c035e3f2061abfba7ade6d475
Author: Kerry Sheh 
Date:   Wed Oct 12 11:42:59 2011 +0800

SB800 RAID: add kconfig option RAID_MISC_ROM_POSITION

SB800 RAID ROM require to put the misc ROM to specific position,
    this patch enable user to put the RAID misc ROM to the right place
    in the coreboot image.

Change-Id: I4fc64df8e091fb0cccd063826ab31a4f198942d1
    Signed-off-by: Kerry She 
    Signed-off-by: Kerry She 
---
 src/southbridge/amd/cimx/sb800/Kconfig      |    9 +++++++++
 src/southbridge/amd/cimx/sb800/Makefile.inc |    1 +
 2 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 17ff3f9..79624e0 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -111,6 +111,15 @@ config RAID_MISC_ROM_FILE
         default "site-local/sb800/misc.bin"
    depends on SB800_SATA_RAID

+config RAID_MISC_ROM_POSITION
+	hex "RAID Misc ROM Position"
+	default 0xFFF00000
+	depends on SB800_SATA_RAID
+	help
+	  The RAID ROM requires that the MISC ROM is located between the range
+	  0xFFF0_0000 to 0xFFF0_FFFF. Also, it must 1K bytes aligned.
+	  The CONFIG_ROM_SIZE must larger than 0x100000.
+
 endif

endif #SOUTHBRIDGE_AMD_CIMX_SB800
diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc
index 30c0d39..48b198d 100644
--- a/src/southbridge/amd/cimx/sb800/Makefile.inc
+++ b/src/southbridge/amd/cimx/sb800/Makefile.inc
@@ -48,5 +48,6 @@ ifeq ($(CONFIG_SB800_SATA_RAID), y)

cbfs-files-y += raid/misc.bin
    raid/misc.bin-file := $(call strip_quotes,$(CONFIG_RAID_MISC_ROM_FILE))
+	raid/misc.bin-position := $(CONFIG_RAID_MISC_ROM_POSITION)
    raid/misc.bin-type := raw
 endif