Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Nico Huber]

Hi,

On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
> No, don't change it, you change the size of coreboot only if during the
> building process "make" complain that there is not enough space but in
> your case your build was already successful leave it like that.

this advice seems very weird to me. I'm not experienced with Bay Trail.
But unless there is a bug in the Bay Trail code, you should always set
the correct ROM_SIZE (to the full flash chip size). Otherwise you may
introduce bugs in code that relies on this setting (e.g. saving the
MRC cache might fail and so would S3 resume).

CBFS_SIZE however is the setting to adjust according to your needs. It
should be at most the size of the BIOS region.
> In the rare circumstance that more space is required you can increase
> coreboot size to 4MB and istill will fit into your system 5MB of space
> available.
>
> "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
> as BYT_orig.bin.new that you can flash to your system.

I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
unnecessary to craft a single file by hand. You can either only flash
the BIOS region (recommended) or add the other regions in coreboot's
config (HAVE_{IFD,ME,GBE}_BIN).

Nico

Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo]

You are right Nico,

I just forgot the troubles this caused me.
I am sorry Vika... My mistake.

I can confirm with Nico:
ROM chip size = 8MB (your case)
CBFS_SIZE = 2 to 5MB (your specific case)

My recommended approach is using the original Intel FW with already included the FD, TXE.

I never tested adding regions to coreboot but you can try.

To have better chances of success you should be dumping hardware settings booting with your original "BIOS" (look for the attached file).

Check if the system is "Memory down"or/and ECC because it will be needed to edit FSP (if using it).
Dump memory settings with the following commands:

sudo dnf install i2c-tools-perl
sudo modprobe eeprom
decode-dimms

If you have not done this already there is still a long way to go.
Don't get intimidated, just do it, if you have questions just ask.... I will try to help

Good luck,
Jose.

‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
On Wednesday, September 26, 2018 6:28 PM, Nico Huber  wrote:
> Hi,
>
> On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
> > No, don't change it, you change the size of coreboot only if during the
> > building process "make" complain that there is not enough space but in
> > your case your build was already successful leave it like that.
>
> this advice seems very weird to me. I'm not experienced with Bay Trail.
> But unless there is a bug in the Bay Trail code, you should always set
> the correct ROM_SIZE (to the full flash chip size). Otherwise you may
> introduce bugs in code that relies on this setting (e.g. saving the
> MRC cache might fail and so would S3 resume).
>
> CBFS_SIZE however is the setting to adjust according to your needs. It
> should be at most the size of the BIOS region.
> > In the rare circumstance that more space is required you can increase
> > coreboot size to 4MB and istill will fit into your system 5MB of space
> > available.
> > "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
> > as BYT_orig.bin.new that you can flash to your system.
>
> I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
> unnecessary to craft a single file by hand. You can either only flash
> the BIOS region (recommended) or add the other regions in coreboot's
> config (HAVE_{IFD,ME,GBE}_BIN).
>
> Nico