Sorry, neglected to send original reply to list.
Knut Kujat wrote:
Andrew Goodbody escribió:
Knut Kujat wrote:
Any suggestions ?
The vendor BIOS is doing some initialisation that coreboot is not. This init survives a short shutdown but is lost after a longer period without power.
Yes, vendor BIOS must be doing something different when initializing ram. But why is coreboot working just fine up here in the lab even if I let it unplugged the whole night next morning I plug it back on and it works!
Don't focus on that too much. It's probably to do with the environment, or even just coincidence.
Is there a multiplexer on the SMBUS?
I honestly don't know, I have:
A multiplexer on the SMBUS was just something that occurred to me. To find it you would need to actually use the SMBUS controller to scan the SMBUS for devices. This is not a trivial task but I think there may be tools out there to help you.
A better approach would be to start by actually debugging what is going wrong in RAM init. That will tell you the area to investigate for differences.
Andrew
On 3/5/10 2:33 PM, Andrew Goodbody wrote:
Sorry, neglected to send original reply to list.
Knut Kujat wrote:
Andrew Goodbody escribió:
Knut Kujat wrote:
Any suggestions ?
The vendor BIOS is doing some initialisation that coreboot is not. This init survives a short shutdown but is lost after a longer period without power.
Yes, vendor BIOS must be doing something different when initializing ram. But why is coreboot working just fine up here in the lab even if I let it unplugged the whole night next morning I plug it back on and it works!
Don't focus on that too much. It's probably to do with the environment, or even just coincidence.
I think so too.
Two more suggestions: - compare coreboot and vendor bios with SerialICE - try disabling all cores / cpus except the BSP to make sure the problem is not caused by the PCI access race conditions in the Fam8 and K10 ports...
Stefan
Two more suggestions:
- compare coreboot and vendor bios with SerialICE
- try disabling all cores / cpus except the BSP to make sure the problem
is not caused by the PCI access race conditions in the Fam8 and K10 ports...
Yes good one also.
Rudolf
Stefan