On 5/12/12 1:43 AM, ali hagigat wrote:
If the CPU wb (write back) cache is enabled for the memory range, ramstage() is OK. But CPU can not work with UC(uncached) memory type in Coreboot code. If i define the whole memory un-cached right before jumping to ramstage code ( cbfs_and_run()), CPU does not execute C_start.S and it is actually restarted! Any clue or idea will be much appreciated.
It means your memory is misconfigured, but leaving the cache enabled hides this effect.
Stefan
We keep getting back to the memory issue. I think you have learned a lot and would suggest starting over, completely from scratch. Throw your code away.
I realize this sounds crazy but taking this approach has worked for me several times. I figure out all the things I get wrong and when i start over, it fits together better. Good luck!
ron
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ron minnich -
Stefan Reinauer