Hi all, In my AMD RS780 project, two Marvel Lan chips connect to PCIE GPP port 0&1. One wireless lan chip connects to PCIE GPP port 2. In AMI BIOS, I see Bus 0 Dev4&5&6. But in coreboot, I see BUS 0 DEV 9&a. Is that normal? BR Grant
Check the devicetree.cb. set the correct configuration of gppsb_configuration and gpp_configuration.
Set the needed port as
device pci x.0 on end # xxxxx
and
Please uncomment the PciePowerOffGppPorts() in rs780_pcie.c to see what we can see.
I assume the PCIE GPP you mentioned is GPPSB, which covers the dev 4,5,6,7. The Gpp
covers dev 9,a.
Zheng
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From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Grant Sent: Thursday, July 22, 2010 6:58 AM To: coreboot@coreboot.org Subject: [coreboot] Coreboot NB RS780 Routing
Hi all,
In my AMD RS780 project, two Marvel Lan chips connect to PCIE GPP port 0&1. One wireless lan chip connects to PCIE GPP port 2.
In AMI BIOS, I see Bus 0 Dev4&5&6. But in coreboot, I see BUS 0 DEV 9&a.
Is that normal?
BR Grant
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Bao, Zheng -
Grant