Hello,
in RS780/RS690 ProgK8TempMmioBase() function, the dst-link field is set to zero, so for boards with RS780 not on CPU's HT chain 0, the function will mis-configure the MMIO dst-link routing, and the following enable_pcie_bar3() function will hang when it visits the MMIO.
the following patch fixes the problem, and tested on a K8 board with RS780 on HT chain 1.
Signed-off-by: Liu Tao liutao1980@gmail.com
If the rs class boards are similar enough to have the same code, why not just pull the code into some common location instead of editing each mainboard?
Thanks, wt
On Sun, Oct 10, 2010 at 8:23 PM, Liu Tao liutao1980@gmail.com wrote:
Hello,
in RS780/RS690 ProgK8TempMmioBase() function, the dst-link field is set to zero, so for boards with RS780 not on CPU's HT chain 0, the function will mis-configure the MMIO dst-link routing, and the following enable_pcie_bar3() function will hang when it visits the MMIO.
the following patch fixes the problem, and tested on a K8 board with RS780 on HT chain 1.
Signed-off-by: Liu Tao liutao1980@gmail.com
-- Regards, Liu Tao
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
On Mon, Oct 11, 2010 at 11:23:37AM +0800, Liu Tao wrote:
Hello,
in RS780/RS690 ProgK8TempMmioBase() function, the dst-link field is set to zero, so for boards with RS780 not on CPU's HT chain 0, the function will mis-configure the MMIO dst-link routing, and the following enable_pcie_bar3() function will hang when it visits the MMIO.
the following patch fixes the problem, and tested on a K8 board with RS780 on HT chain 1.
Signed-off-by: Liu Tao liutao1980@gmail.com
Thanks, r5959.
Uwe.