Question about smm handler bin

[fengwei zhang]

Hi all,

I am trying to impelement SMM support for K8/vt8237r, but I am strarking on
build smm handler bin. I understand I need to copy real smm handler to
location 0xa0000. From the ICH4 example, there are two extern varaibles
binary_smm_start and binary_smm_end, I know it defines in
/build/cpu/x86/smm/smm_wrap.ramstage.o. but how does that work?

Suppose I just want to put RSM instruction in the smmhandler, can I just
write instruction "0f aa"(bianry code of RSM) to location 0xa0000 and
0xa0001. I tried this, but my machine went freeze after I invoke SMI.

I am thinking I may need to more instructons, because the SMM start with 16
bits real mode, it may not recongnize the instruction, right?
But I am starking on how to build and copy SMM handler.

I would really appreciate if some one could help me this out.

Best,
Fengwei

[Patrick Georgi]

Am 10.11.2010 18:30, schrieb fengwei zhang:
> Suppose I just want to put RSM instruction in the smmhandler, can I just
> write instruction "0f aa"(bianry code of RSM) to location 0xa0000 and
> 0xa0001. I tried this, but my machine went freeze after I invoke SMI.

I think the SMI entry point is usually 0x8000 into the SMM segment, so
you'd need to put rsm at 0xa8000, not at 0xa0000.
> I am thinking I may need to more instructons, because the SMM start with
> 16 bits real mode, it may not recongnize the instruction, right?

That could be accomodated by ".code16" in the assembly code. We have
some semi-generic SMI handler, originally built to support i945/ICH7.
Not sure how much more generic it can be, Stefan might be able to answer
that.

Patrick

[Rudolf Marek]

Hi all,

Does somebody know how to unlock the Aseg on AMD K8? VIA has some registers in 
K8m890 for that but it seems it does not work. In my implementation I simply did 
the code copy.

Dunno why it does not work the only thing I could think of is that the chipset 
simply returns the PCI read memory cycle back to to memory controller.

http://www.mail-archive.com/[e-mail]/msg10310.html

Thanks,
Rudolf

[Scott Duplichan]

_____

From: [e-mail] [mailto:[e-mail]] On Behalf Of fengwei zhang
Sent: Wednesday, November 10, 2010 11:30 AM
To: [e-mail]
Subject: [coreboot] Question about smm handler bin

Hi all,

I am trying to impelement SMM support for K8/vt8237r, but I am strarking on build smm handler bin. I understand I need to copy real
smm handler to location 0xa0000. From the ICH4 example, there are two extern varaibles binary_smm_start and binary_smm_end, I know
it defines in /build/cpu/x86/smm/smm_wrap.ramstage.o. but how does that work?

Suppose I just want to put RSM instruction in the smmhandler, can I just write instruction "0f aa"(bianry code of RSM) to location
0xa0000 and 0xa0001. I tried this, but my machine went freeze after I invoke SMI.

I am thinking I may need to more instructons, because the SMM start with 16 bits real mode, it may not recongnize the instruction,
right?
But I am starking on how to build and copy SMM handler.

I would really appreciate if some one could help me this out.

Best,
Fengwei

Hello Fengwei,

I think the first instruction executed in your case will be at address A8000. The AMD BKDG states:

MSRC001_0111[SMM_BASE] + 8000h: SMI handler entry point.

As Rudolf said, you need to copy the code into the SMM code space, not the legacy video frame buffer space that occupies the same
address range. The BKDG explains how to do this.

Thanks,

Scott

[Rudolf Marek]

Yes, thanks for the pointers Scott. It looks enough would be to set the MTRR 
because if A-seg valid is 0 then one can copy it there! Just need to set
MTRRfix16K_A0000 Register and most likely WrMem and RdMem must be set to 1.

Thanks,
Rudolf

[Stefan Reinauer]

On 10.11.2010, at 09:30, fengwei zhang  wrote:
> Hi all,
>
> I am trying to impelement SMM support for K8/vt8237r, but I am strarking on build smm handler bin. I understand I need to copy real smm handler to location 0xa0000. From the ICH4 example, there are two extern varaibles binary_smm_start and binary_smm_end, I know it defines in /build/cpu/x86/smm/smm_wrap.ramstage.o. but how does that work?

The SMM handler is built as a separate binary and those external variables are set by the linker so the relocation code can find it.
> Suppose I just want to put RSM instruction in the smmhandler, can I just write instruction "0f aa"(bianry code of RSM) to location 0xa0000 and 0xa0001. I tried this, but my machine went freeze after I invoke SMI.

Besides what Patrick said about putting the code at 0xa8000
your relocation might went wrong. On power-on the SMM entry point is 0x38000 until it it moved to 0xa8000
> I am thinking I may need to more instructons, because the SMM start with 16 bits real mode, it may not recongnize the instruction, right?
> But I am starking on how to build and copy SMM handler.

I strongly suggest that you use and enhance the existing SMM handler. You will have to adapt two things
- the code that opens the ASEG for writing from non-SMM (i82801gx_smi.c)
- the north-/southbridge and CPU specific handlers (i82801gx_smihandler.c for example)
> I would really appreciate if some one could help me this out.
>
> Best,
> Fengwei

Stefan