Questions of GSoC 2019 Project

[Asami Doi]

Hello,

I am Asami. I am doing a master' degree at Nagoya University in Japan.
These are my quick introductions:
  - Done internships twice at Google (Chrome OS/Chromium)
  - Implemented a toy OS from scratch as my hobby (Code is
https://github.com/d0iasm/haribote-os)
  - Love programming but still poor hardware knowledge, so I want to learn
it!

I am interested in contributing to the GSoC 2019 project, especially the
project of "Support QEMU AArch64 or MIPS".
However, I am not sure I can understand this project correctly. So, I have
some questions:
  1. In my understanding, I will need to implement qemu-aarch64/* or
qemu-mips/* in src/mainboard/emulation and src/cpu. Is my understanding
correct?
  2. How can I debug this project? Is it the right way to debug by running
some aarch64 or mips ROMs on QEMU?
  3. How can I find reviewers? I have already pushed a trivial patch(
https://review.coreboot.org/c/coreboot/+/31938) and build bot added one
reviewer automatically. Is it enough to review it?

Thank you,
Asami Doi
[e-mail]

[Mike Banon]

Good day, Asami! Yes, you could debug your coreboot.rom under QEMU,
here's a command that I'm using to run a special i386 coreboot build
at QEMU :

qemu-system-i386 -L . -m 256 -localtime -vga vmware -net
nic,model=rtl8139 -net user -soundhw ac97 -usb -device usb-tablet
-bios ./build/coreboot.rom -serial stdio

It will be different for the other architectures, but the approach is
correct in my opinion: even if you have the coreboot-supported aarch64
/ mips real hardware, I think the initial debug should be done at
QEMU. Maybe there's already some environment at least for MIPS, please
check the mailing list archives. The reviewers could be added manually
at Gerrit interface or they could come by themselves.

By the way, you said that you made a small OS called Haribote. It is
floppy-based, which is a really good thing: SeaBIOS - perhaps the most
popular coreboot payload - supports booting the virtual floppies
stored at CBFS (coreboot filesystem). You could add any floppy by

./build/cbfstool ./build/coreboot.rom add -f ./floppy.img -n
floppyimg/myfloppy.lzma -t raw -c lzma

command - and then you will see it as a SeaBIOS boot entry! So I just
tested your Haribote OS at my Lenovo G505S laptop as a part of
coreboot BIOS, and - my congratulations - Haribote is working almost
as good at the real hardware as in QEMU. The only problem is with
BBALL application: it works fine at QEMU, but on G505S hardware I'm
getting INT 0C : Stack Exception. EIP = 3e . Also, I don't know how to
enlarge a "console" window, so that when I type "ls" command I will be
able to see the whole list of commands and not just the second half of
them ( I had to look at mcopy build log to find out the names for the
rest of apps to run them ).

Best regards,
Mike Banon

On Mon, Mar 18, 2019 at 2:46 PM Asami Doi  wrote:
> Hello,
>
> I am Asami. I am doing a master' degree at Nagoya University in Japan.
> These are my quick introductions:
> Done internships twice at Google (Chrome OS/Chromium)
> Implemented a toy OS from scratch as my hobby (Code is https://github.com/d0iasm/haribote-os)
> Love programming but still poor hardware knowledge, so I want to learn it!
>
> I am interested in contributing to the GSoC 2019 project, especially the project of "Support QEMU AArch64 or MIPS".
> However, I am not sure I can understand this project correctly. So, I have some questions:
> In my understanding, I will need to implement qemu-aarch64/* or qemu-mips/* in src/mainboard/emulation and src/cpu. Is my understanding correct?
> How can I debug this project? Is it the right way to debug by running some aarch64 or mips ROMs on QEMU?
> How can I find reviewers? I have already pushed a trivial patch(https://review.coreboot.org/c/coreboot/+/31938) and build bot added one reviewer automatically. Is it enough to review it?
>
> Thank you,
> Asami Doi
> [e-mail]
> _______________________________________________
> coreboot mailing list -- [e-mail]
> To unsubscribe send an email to [e-mail]

[Asami Doi]

Hello Mike,

Thank you for your response. I could run coreboot.rom on QEMU by the
command you told me.
> Maybe there's already some environment at least for MIPS, please
> check the mailing list archives.

I checked the mailing list archives and found the email.
(
https://mail.coreboot.org/hyperkitty/list/[e-mail]/message/3ACP...
)
According to the email:
> We have all the MIPS architecture code in
> coreboot, but it's falling into complete disrepair because the only
> supported board is some old aborted Google project that nobody has
> hardware for anymore.

However, I couldn't find where the code relating to "some old aborted
Google project".
> So I just tested your Haribote OS at my Lenovo G505S laptop as a part of
> coreboot BIOS, and - my congratulations - Haribote is working almost
> as good at the real hardware as in QEMU.

Thank you for your try. I also ran coreboot + SeaBIOS + HariboteOS on QEMU.
It seemed to work well. This is my hobby project, so a lot of functions are
limited.
Currently, HariboteOS doesn't support enlarging a console window.

Thank you,
Asami Doi

2019年3月24日(日) 16:35 Mike Banon :
> Good day, Asami! Yes, you could debug your coreboot.rom under QEMU,
> here's a command that I'm using to run a special i386 coreboot build
> at QEMU :
>
> qemu-system-i386 -L . -m 256 -localtime -vga vmware -net
> nic,model=rtl8139 -net user -soundhw ac97 -usb -device usb-tablet
> -bios ./build/coreboot.rom -serial stdio
>
> It will be different for the other architectures, but the approach is
> correct in my opinion: even if you have the coreboot-supported aarch64
> / mips real hardware, I think the initial debug should be done at
> QEMU. Maybe there's already some environment at least for MIPS, please
> check the mailing list archives. The reviewers could be added manually
> at Gerrit interface or they could come by themselves.
>
> By the way, you said that you made a small OS called Haribote. It is
> floppy-based, which is a really good thing: SeaBIOS - perhaps the most
> popular coreboot payload - supports booting the virtual floppies
> stored at CBFS (coreboot filesystem). You could add any floppy by
>
> ./build/cbfstool ./build/coreboot.rom add -f ./floppy.img -n
> floppyimg/myfloppy.lzma -t raw -c lzma
>
> command - and then you will see it as a SeaBIOS boot entry! So I just
> tested your Haribote OS at my Lenovo G505S laptop as a part of
> coreboot BIOS, and - my congratulations - Haribote is working almost
> as good at the real hardware as in QEMU. The only problem is with
> BBALL application: it works fine at QEMU, but on G505S hardware I'm
> getting INT 0C : Stack Exception. EIP = 3e . Also, I don't know how to
> enlarge a "console" window, so that when I type "ls" command I will be
> able to see the whole list of commands and not just the second half of
> them ( I had to look at mcopy build log to find out the names for the
> rest of apps to run them ).
>
> Best regards,
> Mike Banon
>
> On Mon, Mar 18, 2019 at 2:46 PM Asami Doi  wrote:
> > Hello,
> >
> > I am Asami. I am doing a master' degree at Nagoya University in Japan.
> > These are my quick introductions:
> > Done internships twice at Google (Chrome OS/Chromium)
> > Implemented a toy OS from scratch as my hobby (Code is
>
> https://github.com/d0iasm/haribote-os)
> > Love programming but still poor hardware knowledge, so I want to
>
> learn it!
> > I am interested in contributing to the GSoC 2019 project, especially the
>
> project of "Support QEMU AArch64 or MIPS".
> > However, I am not sure I can understand this project correctly. So, I
>
> have some questions:
> > In my understanding, I will need to implement qemu-aarch64/* or
>
> qemu-mips/* in src/mainboard/emulation and src/cpu. Is my understanding
> correct?
> > How can I debug this project? Is it the right way to debug by
>
> running some aarch64 or mips ROMs on QEMU?
> > How can I find reviewers? I have already pushed a trivial patch(
>
> https://review.coreboot.org/c/coreboot/+/31938) and build bot added one
> reviewer automatically. Is it enough to review it?
> > Thank you,
> > Asami Doi
> > [e-mail]
> > _______________________________________________
> > coreboot mailing list -- [e-mail]
> > To unsubscribe send an email to [e-mail]

[Patrick Georgi]

Am Do., 28. März 2019 um 08:48 Uhr schrieb Asami Doi :
> > We have all the MIPS architecture code in
> > coreboot, but it's falling into complete disrepair because the only
> > supported board is some old aborted Google project that nobody has
> > hardware for anymore.
>
> However, I couldn't find where the code relating to "some old aborted Google project".

$ git grep -l ARCH.*MIPS src/soc/
src/soc/imgtec/pistachio/Kconfig

indicates that imgtec/pistachio is the only MIPS chipset we have. (the
other chipset directories in src, northbridge and southbridge, are x86
specific, so no need to look in there for MIPS support)

$ git grep -l IMGTEC_PISTACHIO src/mainboard/
src/mainboard/google/urara/Kconfig

indicates that google/urara is the only board in our tree that is
using that SoC.

Regards,
Patrick