[LinuxBIOS] [PATCH] i82371eb: Make all BIOS/ROM areas accessible (or: 440BX boots FILO)

[Uwe Hermann]

See patch.

This was the last missing piece to make the 440BX work so far that it
boots a payload. I have successfully booted into FILO and memtest with
this patch on my Tyan S1846. Also, a full memtest run worked just fine, so
RAM init is ok (but still hardcoded to the S1846 for now).

Bootlog and patch are attached.

I'm now working on the southbridge code, PCI and IDE init are almost
done, expect a patch soon. This should make booting a kernel possible...

Other entries on the 440BX TODO list are:
 - Make RAM init generic, not hardcoded to the S1846
 - Fix up all kinds of stupid hacks and bugs in the code
 - Implement all of the i82371eb southbridge features
 - Fix up Tyan S1846 and ASUS P2B so they actually work
    - This is going to be quite some work, think PIRQ tables and whatnot
 - Port all 440BX boards to Cache as RAM
 - Port lots of other 440BX boards

Uwe.

[LinuxBIOS] [PATCH] i82371eb: Make all BIOS/ROM areas accessible (or: 440BX boots FILO)

[Stefan Reinauer]

* Uwe Hermann  [070527 22:45]:
> Other entries on the 440BX TODO list are:
> Make RAM init generic, not hardcoded to the S1846

This patch was sent around by Alfred Wanga on april 30th
> Port all 440BX boards to Cache as RAM

Is there a working CAR implementation for 440BX?
> Init for the Intel 82371EB southbridge: make all ROM/BIOS regions
> accessible (but not writable), so that reading/loading a payload
> from that area can work (for instance).
>
> Signed-off-by: Uwe Hermann

Acked-by: Stefan Reinauer

[LinuxBIOS] [PATCH] i82371eb: Make all BIOS/ROM areas accessible (or: 440BX boots FILO)

[Uwe Hermann]

On Sun, May 27, 2007 at 10:52:19PM +0200, Stefan Reinauer wrote:
> Uwe Hermann  [070527 22:45]:
> > Other entries on the 440BX TODO list are:
> > Make RAM init generic, not hardcoded to the S1846
>
> This patch was sent around by Alfred Wanga on april 30th

Yep, needs some changes and most importantly a sign-off, though...
Also, I think Corey also had some code which does something related?
I guess we'll merge both together, we'll see...
> > Port all 440BX boards to Cache as RAM
>
> Is there a working CAR implementation for 440BX?

Dunno, probably not. Is this chipset specific anyway? Shouldn't a
generic i586 CAR implementation work here?

OR rather, shouldn't the code from src/cpu/x86/car/* work?
> Acked-by: Stefan Reinauer

Thanks, r2700.