r774 - coreboot-v3/southbridge/amd/amd8111

Author: rminnich
Date: 2008-08-16 01:37:29 +0200 (Sat, 16 Aug 2008)
New Revision: 774

Modified:
   coreboot-v3/southbridge/amd/amd8111/amd8111_smbus.h
   coreboot-v3/southbridge/amd/amd8111/stage1_smbus.c
Log:
Small typos.

Signed-off-by: Ronald G. Minnich 
Acked-by: Ronald G. Minnich

Modified: coreboot-v3/southbridge/amd/amd8111/amd8111_smbus.h
===================================================================
--- coreboot-v3/southbridge/amd/amd8111/amd8111_smbus.h	2008-08-15 22:04:31 UTC (rev 773)
+++ coreboot-v3/southbridge/amd/amd8111/amd8111_smbus.h	2008-08-15 23:37:29 UTC (rev 774)
@@ -1,4 +1,5 @@
 #include <device/smbus_def.h>
+#include <io.h>

#define SMBGSTATUS 0xe0
 #define SMBGCTL    0xe2

Modified: coreboot-v3/southbridge/amd/amd8111/stage1_smbus.c
===================================================================
--- coreboot-v3/southbridge/amd/amd8111/stage1_smbus.c	2008-08-15 22:04:31 UTC (rev 773)
+++ coreboot-v3/southbridge/amd/amd8111/stage1_smbus.c	2008-08-15 23:37:29 UTC (rev 774)
@@ -37,12 +37,11 @@

void enable_smbus(void)
 {
-	u32 bdf;
+	u32 dev;
    u8 enable;

-	/* this 746b is the ACPI device. This is from original code. It's weird however. */
-	pci_locate_device_on_bus(0, PCI_VENDOR_ID_AMD, 0x746b, &dev);
-	if (dev == PCI_DEV_INVALID) {
+	/* Yes, the ACPI device controls the SMBUS.  */
+	if (!pci_conf1_find_on_bus(0, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ACPI, &dev)){
    	die("SMBUS controller not found\r\n");
    }