Dear coreboot readers!
This is the automated build check service of coreboot.
The developer "hailfinger" checked in revision 3091 to the coreboot source repository and caused the following changes:
Change Log: Handle JEDEC JEP106W continuation codes in SPI RDID. Some vendors like Programmable Micro Corp (PMC) need this. Both the serial and parallel flash JEDEC detection routines would benefit from a parity/sanity check of the vendor ID. Will do this later.
Add support for the PMC Pm25LV family of SPI flash chips.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net Acked-by: Chris Lingard chris@stockwith.co.uk
Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3091&device=serengeti_c...
If something broke during this checkin please be a pain in hailfinger's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should be backed out.
Best regards, coreboot automatic build system
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