Patch merged into coreboot/master: 2efc880 intel/gm45: new northbridge

the following patch was just integrated into master:
commit 2efc8808b8bfaee0a0e8f3ee387ecd9a3f049705
Author: Patrick Georgi 
Date:   Tue Nov 6 11:03:53 2012 +0100

intel/gm45: new northbridge

The code supports DDR3 boards only. RAM init for DDR2 is sufficiently
    different that it requires separate code, and we have no boards to
    test that.

Change-Id: I9076546faf8a2033c89eb95f5eec524439ab9fe1
    Signed-off-by: Patrick Georgi 
    Signed-off-by: Nico Huber 
    Reviewed-on: http://review.coreboot.org/1689
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer

See http://review.coreboot.org/1689 for details.

-gerrit