r3466 - in trunk/coreboot-v2/src: cpu/amd/car cpu/x86/car northbridge/amd/amdk8

Author: stepan
Date: 2008-08-02 21:17:42 +0200 (Sat, 02 Aug 2008)
New Revision: 3466

Modified:
   trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c
   trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c
   trunk/coreboot-v2/src/northbridge/amd/amdk8/get_sblk_pci1234.c
Log:
adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot"
in a number of places.

Signed-off-by: Stefan Reinauer 
Acked-by: Stefan Reinauer

Modified: trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c	2008-08-02 15:15:23 UTC (rev 3465)
+++ trunk/coreboot-v2/src/cpu/amd/car/copy_and_run.c	2008-08-02 19:17:42 UTC (rev 3466)
@@ -23,9 +23,9 @@
    uint8_t *src, *dst; 
         unsigned long ilen, olen;

-	print_debug("Copying coreboot to RAM.\r\n");

#if !CONFIG_COMPRESS 
+	print_debug("Copying coreboot to RAM.\r\n");
    __asm__ volatile (
    	"leal _liseg, %0\n\t"
    	"leal _iseg, %1\n\t"
@@ -35,6 +35,7 @@
    );
    memcpy(dst, src, olen);
 #else 
+	print_debug("Uncompressing coreboot to RAM.\r\n");

__asm__ volatile (
            "leal _liseg, %0\n\t"
@@ -48,12 +49,12 @@
 //	dump_mem(src, src+0x100);

olen = unrv2b(src, dst, &ilen);
-	print_debug_cp_run("linxbios_ram.nrv2b length = ", ilen);
+	print_debug_cp_run("coreboot_ram.nrv2b length = ", ilen);

#endif
 //	dump_mem(dst, dst+0x100);

-	print_debug_cp_run("linxbios_ram.bin   length = ", olen);
+	print_debug_cp_run("coreboot_ram.bin   length = ", olen);

print_debug("Jumping to coreboot.\r\n");

@@ -98,12 +99,12 @@
 //      dump_mem(src, src+0x100);

olen = unrv2b(src, dst, &ilen);
-//        print_debug_cp_run("linxbios_apc.nrv2b length = ", ilen);
+//        print_debug_cp_run("coreboot_apc.nrv2b length = ", ilen);

#endif
 //      dump_mem(dst, dst+0x100);

-//        print_debug_cp_run("linxbios_apc.bin   length = ", olen);
+//        print_debug_cp_run("coreboot_apc.bin   length = ", olen);

//        print_debug("Jumping to coreboot AP code in CAR.\r\n");

Modified: trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c
===================================================================
--- trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c	2008-08-02 15:15:23 UTC (rev 3465)
+++ trunk/coreboot-v2/src/cpu/x86/car/copy_and_run.c	2008-08-02 19:17:42 UTC (rev 3466)
@@ -52,9 +52,9 @@
 #endif
 //	dump_mem(dst, dst+0x100);
 #if CONFIG_USE_INIT
-	printk_spew("linxbios_ram.bin length = %08x\r\n", olen);
+	printk_spew("coreboot_ram.bin length = %08x\r\n", olen);
 #else
-	print_spew("linxbios_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n");
+	print_spew("coreboot_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n");
 #endif
    print_debug("Jumping to coreboot.\r\n");

Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/get_sblk_pci1234.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/get_sblk_pci1234.c	2008-08-02 15:15:23 UTC (rev 3465)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/get_sblk_pci1234.c	2008-08-02 19:17:42 UTC (rev 3466)
@@ -92,7 +92,7 @@
  *     pci1234[0] will record the south bridge link and bus range
  *     pci1234[i] will record HT chain i.
  *
- * For example, on the Tyan S2885 linxbios_ram will put the AMD8151 chain (HT
+ * For example, on the Tyan S2885 coreboot_ram will put the AMD8151 chain (HT
  * link 0) into the register 0xE0, and the AMD8131/8111 HT chain into the
  * register 0xE4.
  *