Re: [coreboot] Where is the first instrucion?

[Zoran Stojsavljevic]

Hello Ron,

These are the excellent points! I did not know/had no clue this myself. It
is a good remark, I would not know to search/discover for this!?

The other good point is that CAR/NEM was developed by student in INTEL,
doing his internship (which I always asked myself why such major things
were developed by students???)?! ;-)

I have one question here:
> Basically, in the classic car we got in 2005, the steps on x86 are:
> enable cache

*> do references to set tags*
> disable cache (really!)
> then cache as ram works.

I am interested how this is implemented, in *RED* (if you can point to some
Coreboot implementation)?

Hello Qureshi,

Any quick points about *do reference to set tags *(implementation wise)?

Thank you all,
Zoran

On Tue, Aug 9, 2016 at 6:44 PM, ron minnich  wrote:
> I have not read this thread closely and maybe I'm telling you something
> you know. But I want to warn you about CD. I know it is named 'cache
> disabled'
> but that's not quite what it means.
>
> I'm trying and failing to find the original slide deck from the UNM grad
> student (and intel employee) who first implemented our cache as ram in
> 2005. His point to me was that CD doesn't *really* mean cache hardware is
> disabled, just that it changes cache hardware behavior such that refills
> from memory are disabled. If there are valid tags in the cache then loads
> that hit those tags will work. So the task for CAR on x86 is to create
> valid tags, then set CD. His point was the breakthrough for me on
> understanding CAR on x86. Ollie Lo and I had been stuck on this point for a
> while, we kept thinking we could not set CD and have CAR work; in fact,
> setting CD is part of ensuring CAR works. The Intel employee's point was
> "you have to read between the lines in section III".
>
> you can
> git grep DO.NOT.INVALIDATE
> for a few comments on this and it may help.
>
> Basically, in the classic car we got in 2005, the steps on x86 are:
> enable cache
> do references to set tags
> disable cache (really!)
> then cache as ram works.
>
> Things have changed on some CPUs since then and we now even have
> chipset-dependent x86 CAR code but I suspect the basic idea remains the
> same on x86.
>
> You may already know this, just wanted to make sure.
>
> ron