New subject: Skylake FSP 1.1 without verstage?

5 Oct 2016


      Hey Trammell,
congratulations ! I guess you are releasing the coreboot payload at the
33c3 ?
Could you please submit a bug report at ticket.coreboot.org for that issue.
Best Regards
Philipp
On 10/06/2016 01:25 AM, Trammell Hudson wrote:
...
On Wed, Oct 05, 2016 at 03:19:11PM -0500, Aaron Durbin wrote:
...
On Wed, Oct 5, 2016 at 3:08 PM, Trammell Hudson hudson@trmm.net wrote:
...
CBFS: 'Master Header Locator' located CBFS at [a00100:ffffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset afc0 size 12e29
Decompressing stage fallback/ramstage @ 0x7abbffc0 (743408 bytes)
Loading module at 7abc0000/7abc0000 with entry 7abc0000. filesize: 0x28d88 memsize: 0xb57b0
Processing 2472 relocs. Offset value of 0x7aac0000
src/arch/x86/boot.c:223: jumping to 7abc0000
(and then it crashes)
You can try writing characters to the serial console in
src/arch/x86/c_start.S. Do you have the ability to read post codes?
That's the best way to know how deep you are getting through c_start.S
in the jump to ramstage.
Thanks to a servo board, I can read the port 80 codes and verified
that the instruction causing the problem is the lgdt / jmp combo
in c_start.S:
_start:
        cli
        lgdt    %cs:gdtaddr
#ifndef __x86_64__
        ljmp    $0x10, $1f
#endif
1:	movl    $0x18, %eax   // <---- never reached with relocatable
...
[...]
I'm not sure why it's crashing (or just not spitting anything out).
You could certainly try disabling RELOCATABLE_RAMSTAE and see if that
fairs better.
It looks like CONFIG_SOC_INTEL_SKYLAKE forces relocatable ramstage;
I've modified src/soc/intel/skylake/Kconfig to disable it and now
it makes it all the way into the payload.
And by adding the i915 driver to the Linux payload, it is able to
bring up the console in a miniscule font!
https://www.flickr.com/photos/osr/30026718432/in/photostream/lightbox/
I'm declaring today a huge success!

Re: [coreboot] Skylake FSP 1.1 without verstage?