note that this debug header is going away in new Chrome OS designs. Its functionality is going to be provided by the closed case debugging (aka CCD) facility, where authorized user using a special debug cable can gain access to the AP and EC consoles, reprogram AP and EC firmware, etc.
-vb
On Mon, Oct 2, 2017 at 2:57 PM, Julius Werner jwerner@chromium.org wrote:
The only special thing about Chromebooks is that they have a standardized debug header, specified here: https://www.chromium.org/chromium-os/servo
The header is not populated on consumer devices, but the footprint should still be there so you can solder it yourself. You can also just solder to the UART pins directly which are probably the most interesting ones to you. There are SPI lines on it too and it's even possible to hook up an EM100 over it, although I'm not 100% sure of the details for that (I usually find that the ROM itself flashes fast enough so I don't need an emulator).
Feel free to ask if you have any questions about how coreboot works on your Jaq or Elm, happy to help!
On Sun, Oct 1, 2017 at 11:31 PM, Paul Menzel paulepanter@users.sourceforge.net wrote:
Dear coreboot folks,
Do you have any suggestions on how to get an efficient development setup for Google Chromebooks, which I’d describe as laptops with soldered flash ROM chip. In my case, it’s a Medion AKOYA S2013 (google/veyron_jaq), and an Acer Chromebook R 13 (google/elm).
I have access to a BeagleBone Black, a compatible clip and a Dediprog EM100-Pro. As the flash ROM chip is not soldered, I guess only the first two are of interest, as the chip is soldered and I am unable to remove the chip, and solder a socket on it.
I ask, because maybe I miss some unknown “feature” of the Google Chromebooks, or there could be an emulator, like AMD SimNow, or something similar.
Thanks,
Paul
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Vadim Bendebury