On 26.11.2008 10:17, svn@coreboot.org wrote:
Author: stepan Date: 2008-11-26 10:17:29 +0100 (Wed, 26 Nov 2008) New Revision: 1059
Modified: coreboot-v3/arch/x86/intel/core2/stage0.S Log: back out until this issue is really fixed. Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
OK, and what failed this time? BIST? Last POST code? I want to fix this, but the information I have available is rather scarce. It is obvious that the existing code is broken and works only by accident for some platforms. AFAICS we can even scribble randomly over memory with the current Core2Duo CAR.
I'll send a patch to re-add the comments. If the comments break anything, either the tests are flaky or your gcc/gas is totally broken.
Regards, Carl-Daniel