Corey, I am a little confused about the significance of the row_offset in the i82810 raminit.c.
- What do you mean by row? Each row of DRAM technologies (Side) or
each row of DIMM (Socket)?? Two different things.
"GMCH supports 4 physical rows of system memory in 2 DIMMs. The width of a row is 64 bits. The DRAM Row Population Register defines the population of each Side of each DIMM." - from IntelĀ® 82810/82810-DC100 (GMCH)
a row in the intel datasheets is always one side of a memory module. one side means: there are single-sided dimms and double sided dimms. you have to configure each side of the memory module in order to make it work correctly. please take a look at my previous post: "Intel DRB HOWTO .. a 1st draft.". i tried to explain how those registers work..on the Intel 430FX. they work the same on every other (intel) chipset, too.
/* Set the row offset, in KBytes (should this be
- Kbits?). Note that this offset is the start of the
- next row.
*/ row_offset = (dimm_size * 4 * 1024);
- If this the start of the next row should it be row_offset +1 Kilobyte??
As Corey already stated: a memory region starts at 0 and ends at regionsize-1. the next memory region starts at regionsize then. example: 1MB = 1*1024*1024 = 1048576 (decimal) = 100000h. the 1MB region would start at 0 and end at 100000h-1 = 0FFFFFh. take a look at the intel datasheet mentioned above, there is a memory map at page 72.
just if someone was wondering: i can provide a sniplet of code that calculates the start address of the current region from the contents of the Intel row offset register for the previous row.
btw. converting between kilobytes and kilobits is just a simple left shift by 3 digits.
i'll restart working on more memory init functions in mid september. my implementation will work without reading any spd data and detect the size of a memory module just by reading/writing data. when i'm done with the socket 7 chipsets, i'll continue with the slot1/s370 ones..hope it won't take too long.