Re: [coreboot] [PATCH] Support for Intel D810E2CB (i810e/ICH2)

[Stefan Reinauer]

> Hello,
> This patch adds support for the Intel D810E2CB desktop board. This
> patch has to go in after the other two patches I have submitted, it is
> dependent on them. Hurray, this is the first i810 board running CAR :-)
>
> Build and boot (bootlog attached) tested:
>
> Signed-off by: Joseph Smith

Acked-by: Stefan Reinauer 
with some caveats:
> Index: src/mainboard/intel/d810e2cb/gpio.c
>
> --- src/mainboard/intel/d810e2cb/gpio.c	(revision 0)
> +++ src/mainboard/intel/d810e2cb/gpio.c	(revision 0)
> @@ -0,0 +1,212 @@
> +#define ICH_IO_BASE_ADDR	0x00000500 /* GPIO base address register */

This is duplicated from i82801ax_lpc.c ... Can it go into i82801ax.h and
be included here instead? (It's also called GPIO_BASE_ADDRESS elsewhere)
> /* Set the value for GPIO base address register and enable GPIO. */
> pci_write_config32(dev, 0x58, (ICH_IO_BASE_ADDR | 1));
> pci_write_config8(dev, 0x5c, 0x10);

0x58 is GPIO_BASE_ICH0_5 in i82801ax.h (should be renamed to GPIO_BASE
 I guess)
> udelay(10);
> Index: src/mainboard/intel/d810e2cb/Kconfig
>
> --- src/mainboard/intel/d810e2cb/Kconfig	(revision 0)
> +++ src/mainboard/intel/d810e2cb/Kconfig	(revision 0)
> @@ -0,0 +1,65 @@
> +##
> +## This file is part of the coreboot project.
> +##
> +## Copyright (C) 2010 Joseph Smith 
> +##
> +## This program is free software; you can redistribute it and/or modify
> +## it under the terms of the GNU General Public License as published by
> +## the Free Software Foundation; version 2 of the License.
> +##
> +## This program is distributed in the hope that it will be useful,
> +## but WITHOUT ANY WARRANTY; without even the implied warranty of
> +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +## GNU General Public License for more details.
> +##
> +## You should have received a copy of the GNU General Public License
> +## along with this program; if not, write to the Free Software
> +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> +##
>
> +config BOARD_INTEL_D810E2CB
> bool "D810E2CB"
> select ARCH_X86
> select CPU_INTEL_SOCKET_FC_PGA370
> select NORTHBRIDGE_INTEL_I82810
> select SOUTHBRIDGE_INTEL_I82801BX
> select SUPERIO_SMSC_SMSCSUPERIO
> select HAVE_PIRQ_TABLE
> select UDELAY_TSC
> select BOARD_ROMSIZE_KB_512
> select HAVE_MAINBOARD_RESOURCES
> select USE_PRINTK_IN_CAR

can this go into the CPU's Kconfig?
> select GFXUMA
> select USE_DCACHE_RAM

And this, too?
> select TINY_BOOTBLOCK

And this?
> +config MAINBOARD_DIR
> string
> default intel/d810e2cb
> depends on BOARD_INTEL_D810E2CB
>
> +config MAINBOARD_PART_NUMBER
> string
> default "D810E2CB"
> depends on BOARD_INTEL_D810E2CB
>
> +config HAVE_OPTION_TABLE
> bool
> default n
> depends on BOARD_INTEL_D810E2CB
>
> +config DCACHE_RAM_BASE
> hex
> default 0xffdf8000
> depends on BOARD_INTEL_D810E2CB

And this.
> +config DCACHE_RAM_SIZE
> hex
> default 0x8000
> depends on BOARD_INTEL_D810E2CB

And this.
> +config IRQ_SLOT_COUNT
> int
> default 7
> depends on BOARD_INTEL_D810E2CB

Stefan