Thanks. Your advice is quite helpful.
I got the BMP and BSF, created a vBIOS which enables the DDI2 as DP. The vBIOS has been
validated by IBV(AMI) BIOS.
But the VBIOS can not enable DDI2 in Coreboot. I assume I still miss something.
Zheng
________________________________ From: Nico Huber nico.h@gmx.de Sent: Wednesday, August 9, 2017 6:29 PM To: Zheng Bao; coreboot@coreboot.org Subject: Re: [coreboot] [Broadwell-U]How the eDP, DDI1, DDI2 are enabled?
On 08.08.2017 05:39, Zheng Bao wrote:
In text mode, only one display can be enabled.
Can this enabled display port be DDI1 or DDI2?
I just extracted VBIOS from BIOS provided on board. I assume the display ports are enabled based on the board settings.
Can I just set register "gpu_panel_port_select" = "2" to enable DDI1?
No, unfortunately not. This setting only affects the panel power sequen- cer (i.e. which port needs special care because it hosts a panel whose power is controlled by us). It shouldn't affect the VBIOS.
Again, the VBIOS has many options, set in the binary. I know free tools to dump them partially, but none to set them. The regular way is to ask Intel for their Binary Modification Program (BMP, may be compatible with Intel's Binary Configuration Tool [1]) *and* a description file for the Video BIOS Table format (.bsf IIRC). That .bsf file is specific to the chipset generation (I can't find one for Broadwell, sadly), though, one for another generation might work too. Sometimes these files can be found in graphics driver packages or FSP [2].
If you happen to get the Intel tool running, I advice to double check the result in a hex editor (e.g. there should be only the change you made, plus about two checksums).
Nico
[1] https://github.com/IntelFsp/BCT [https://avatars1.githubusercontent.com/u/19785541?v=4&s=400]https://github.com/IntelFsp/BCT
GitHub - IntelFsp/BCT: Binary Configuration Tool for Intel ...https://github.com/IntelFsp/BCT github.com BCT - Binary Configuration Tool for Intel(R) FSP
[2] Here is one for Kabylake (the closest I could find, might be incompatible though):
https://github.com/IntelFsp/FSP/blob/Kabylake/KabylakeFspBinPkg/SampleCode/V... [https://avatars1.githubusercontent.com/u/19785541?v=4&s=400]https://github.com/IntelFsp/FSP/blob/Kabylake/KabylakeFspBinPkg/SampleCode/Vbt/Vbt.bsf
IntelFsp/FSPhttps://github.com/IntelFsp/FSP/blob/Kabylake/KabylakeFspBinPkg/SampleCode/Vbt/Vbt.bsf github.com Repository of FSP binaries posted by Intel