Hi,here is the POST output by the serial console....
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coreboot-4.0-r Mon Apr 12 13:20:12 CST 2010 starting... now booting... real_main Enabling routing table for node 00 done. Enabling UP settings Disabling read/write/fill probes for UP... done. coherent_ht_finalize done core0 started: now booting... Core0 started started ap apicid: SBLink=00 NC node|link=00 00entering optimize_link_incoherent_ht sysinfo->link_pair_num=0x1 entering ht_optimize_link pos=0x8a, unfiltered freq_cap=0x8035 pos=0x8a, filtered freq_cap=0x35 pos=0x6e, unfiltered freq_cap=0x75 pos=0x6e, filtered freq_cap=0x75 freq_cap1=0x35, freq_cap2=0x75 dev1 old_freq=0x0, freq=0x5, needs_reset=0x1 dev2 old_freq=0x0, freq=0x5, needs_reset=0x1 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 after ht_optimize_link for link pair 0, reset_needed=0x1 after optimize_link_read_pointers_chain, reset_needed=0x1 01K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 05 VIA HT caps: 0075 0101Xht reset - soft reset
coreboot-4.0-r Mon Apr 12 13:20:12 CST 2010 starting... now booting... real_main Enabling routing table for node 00 done. Enabling UP settings Disabling read/write/fill probes for UP... done. coherent_ht_finalize done core0 started: now booting... Core0 started started ap apicid: SBLink=00 NC node|link=00 00entering optimize_link_incoherent_ht sysinfo->link_pair_num=0x1 entering ht_optimize_link pos=0x8a, unfiltered freq_cap=0x8035 pos=0x8a, filtered freq_cap=0x35 pos=0x6e, unfiltered freq_cap=0x75 pos=0x6e, filtered freq_cap=0x75 freq_cap1=0x35, freq_cap2=0x75 dev1 old_freq=0x5, freq=0x5, needs_reset=0x0 dev2 old_freq=0x5, freq=0x5, needs_reset=0x0 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 after ht_optimize_link for link pair 0, reset_needed=0x0 after optimize_link_read_pointers_chain, reset_needed=0x0 00K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 05 VIA HT caps: 0075 00after enable_fid_change