Author: stepan Date: Tue Apr 13 23:31:42 2010 New Revision: 5422 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5422
Log: ip1000: fix seabios start, fix flash gpio detection simplify i82830 code. Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Modified: trunk/src/mainboard/thomson/ip1000/mainboard.c trunk/src/northbridge/intel/i82830/northbridge.c
Modified: trunk/src/mainboard/thomson/ip1000/mainboard.c ============================================================================== --- trunk/src/mainboard/thomson/ip1000/mainboard.c Tue Apr 13 23:29:43 2010 (r5421) +++ trunk/src/mainboard/thomson/ip1000/mainboard.c Tue Apr 13 23:31:42 2010 (r5422) @@ -74,27 +74,15 @@
static void flash_gpios(void) { - u32 flash_base = 0xfff80000; - u8 manufacturer_id, device_id; - - // reset mode - write8(flash_base, 0xff); - udelay(10); - // read id - write8(flash_base, 0x90); - udelay(10); - manufacturer_id = read8(flash_base); - device_id = read8(flash_base + 1); - // reset mode - write8(flash_base, 0xff); - udelay(10); + u8 manufacturer_id = read8(0xffbc0000); + u8 device_id = read8(0xffbc0001);
if ((manufacturer_id == 0x20) && ((device_id == 0x2c) || (device_id == 0x2d))) { printk(BIOS_DEBUG, "Detected ST M50FW0%c0 flash:\n", (device_id==0x2c)?'4':'8'); u8 fgpi = read8(0xffbc0100); - printk(BIOS_DEBUG, " FGPI0 [%c] FGPI1 [%c] FGPI2 [%c] FGPI3 [%c] FGPI4 [%c]", + printk(BIOS_DEBUG, " FGPI0 [%c] FGPI1 [%c] FGPI2 [%c] FGPI3 [%c] FGPI4 [%c]\n", (fgpi & (1 << 0)) ? 'X' : ' ', (fgpi & (1 << 1)) ? 'X' : ' ', (fgpi & (1 << 2)) ? 'X' : ' ', @@ -109,7 +97,6 @@ #if CONFIG_PCI_OPTION_ROM_RUN_YABEL static int int15_handler(void) { - u8 display_id; #define BOOT_DISPLAY_DEFAULT 0 #define BOOT_DISPLAY_CRT (1 << 0) #define BOOT_DISPLAY_TV (1 << 1) @@ -126,8 +113,8 @@ switch (M.x86.R_AX) { case 0x5f35: /* Boot Display */ M.x86.R_AX = 0x005f; // Success - // M.x86.R_CL = BOOT_DISPLAY_TV; - M.x86.R_CL = BOOT_DISPLAY_DEFAULT; + M.x86.R_CL = BOOT_DISPLAY_TV2; + //M.x86.R_CL = BOOT_DISPLAY_DEFAULT; break; case 0x5f36: /* Boot TV Format Hook */ printk(BIOS_DEBUG, "Boot TV Format Hook. TODO\n");
Modified: trunk/src/northbridge/intel/i82830/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i82830/northbridge.c Tue Apr 13 23:29:43 2010 (r5421) +++ trunk/src/northbridge/intel/i82830/northbridge.c Tue Apr 13 23:31:42 2010 (r5422) @@ -114,49 +114,52 @@
pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev->link[0].children; - if (mc_dev) { - unsigned long tomk, tolmk; - int idx; - - if (CONFIG_VIDEO_MB == 512) { - igd_memory = (CONFIG_VIDEO_MB); - printk(BIOS_DEBUG, "%dKB IGD UMA\n", igd_memory >> 10); - } else { - igd_memory = (CONFIG_VIDEO_MB * 1024); - printk(BIOS_DEBUG, "%dMB IGD UMA\n", igd_memory >> 10); - } - - /* Get the value of the highest DRB. This tells the end of - * the physical memory. The units are ticks of 32MB - * i.e. 1 means 32MB. - */ - tomk = ((unsigned long)pci_read_config8(mc_dev, DRB + 3)) << 15; - tomk -= igd_memory; - - /* For reserving UMA memory in the memory map */ - uma_memory_base = tomk * 1024ULL; - uma_memory_size = igd_memory * 1024ULL; - printk(BIOS_DEBUG, "Available memory: %ldKB\n", tomk); - - /* Compute the top of low memory. */ - tolmk = pci_tolm >> 10; - if (tolmk >= tomk) { - /* The PCI hole does does not overlap the memory. */ - tolmk = tomk; - } - - /* Report the memory regions. */ - idx = 10; - ram_resource(dev, idx++, 0, 640); - ram_resource(dev, idx++, 1024, tolmk - 1024); + if (!mc_dev) + return;
-#if CONFIG_WRITE_HIGH_TABLES==1 - /* Leave some space for ACPI, PIRQ and MP tables */ - high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024; - high_tables_size = HIGH_TABLES_SIZE * 1024; -#endif + unsigned long tomk, tolmk; + int idx; + + if (CONFIG_VIDEO_MB == 512) { + igd_memory = (CONFIG_VIDEO_MB); + printk(BIOS_DEBUG, "%dKB IGD UMA\n", igd_memory >> 10); + } else { + igd_memory = (CONFIG_VIDEO_MB * 1024); + printk(BIOS_DEBUG, "%dMB IGD UMA\n", igd_memory >> 10); + } + + /* Get the value of the highest DRB. This tells the end of + * the physical memory. The units are ticks of 32MB + * i.e. 1 means 32MB. + */ + tomk = ((unsigned long)pci_read_config8(mc_dev, DRB + 3)) << 15; + tomk -= igd_memory; + + /* For reserving UMA memory in the memory map */ + uma_memory_base = tomk * 1024ULL; + uma_memory_size = igd_memory * 1024ULL; + printk(BIOS_DEBUG, "Available memory: %ldKB\n", tomk); + + /* Compute the top of low memory. */ + tolmk = pci_tolm >> 10; + if (tolmk >= tomk) { + /* The PCI hole does does not overlap the memory. */ + tolmk = tomk; } + + /* Report the memory regions. */ + idx = 10; + ram_resource(dev, idx++, 0, 640); + ram_resource(dev, idx++, 768, 256); + ram_resource(dev, idx++, 1024, tolmk - 1024); + assign_resources(&dev->link[0]); + +#if CONFIG_WRITE_HIGH_TABLES==1 + /* Leave some space for ACPI, PIRQ and MP tables */ + high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024; + high_tables_size = HIGH_TABLES_SIZE * 1024; +#endif }
static struct device_operations pci_domain_ops = {