My two cents regarding funding:
There are quite a lot of concerned users who use AGESA platforms, but aren't able to directly contribute to development (documentation and guides are indeed thin). Funding through the usual channels for the overall coreboot project seems to be impractical for bureaucratic reasons, but perhaps an effort chosen here could be more readily funded through something like https://www.bountysource.com/ ?
Even if the full total can't be covered, it may make it more worth developer(s) time to undertake.
There's also potential tie-in with https://github.com/osresearch/heads/issues/719 as the goal, cleaned up AGESA code fit for mainline, is very much the same. If they clean up the fam15h code that may provide a good base to undertake other cleanup work for 16h and 14h.
On Sun, Nov 28, 2021 at 5:24 PM Nico Huber nico.h@gmx.de wrote:
On 28.11.21 19:54, Nico Huber wrote:
Oh, and I almost forgot, the board ports don't look like coreboot code. There's CamelCase, odd tables in C code (as if there was no devicetree), AGESA configuration done in the code of each and every mainboard that should be done only once in the chipset code... IMHO it looks like a mess. When one is used to coreboot and then sees this, there should be no doubt why we have deprecation squabbles ;) This [1] might be related. Board ports of other platforms have seen a lot of updates over the last ten years, that's not easy for ports where one doesn't know what to begin with.
Looks like I forgot the ref here.