Hello there, i won't annoy people with my questions here in but some of them in the IRC repeadedly told me to ask the ML. So here we go :
On the way of a new/changed port for a Tyan B4882 Mobo which is/was somewhat in the supported list but with a lot of issues ( at lest for me ) i started over and did it from scratch, using parts from serengeti cheetah which is basically the same hardware with another CPU-Socket.
The Board in Question will be equipped with 4 dual-cores from type
OST880FAA6CC
this specific model is a HP-OEM CPU functionally identical to it's OSA sibling but drawing just 68 instead of 95W.
it reports as Family 0x0F, Model 0x21, Stepping 0x02
so i did some minor changes ( change Socket, and FAM_F, fake a CPU_SOCKET_TYPE with 0x0a which would be a logical predecessor of 0x10 for Socket_F )
and got an error-free build.
However this code can't and won't work because S940 has no DDR2 but DDR and so i get "no RAM" as assumed. Right now i did nothing else enabling all DRAM clocks due to the lack of Documentation for this particular model, the Kernel and Bios Developer Guide for FAM_F does not even mention Socket 940, in particular shown in the functional description from
Function2, Offset 0x88 [31:24].
The same Board/CPU boots with a slightly modified s4882 setup from the past which is pre_f, pointing out either this model lacks on some register-changes or it runs in a somewhat compatible mode.
on the other hand, the CPU in question and a Socket_F CPU from a different board reporting both the very same " DRAM Controller [1022:1102] ".
so my final "real Question" is : can anyone tell/provide more details/links/specs/whitepapers/whatever to shed some light in this dark place ?
P.S: from certain readings, this may also affect single-cores from 852 and above because a bunch of Boards did not even boot them without a bios-change, if i did not mix something up, we are talking about a 90nm Italy/Egypt core with Rev. E6+.
PPS: I wish all a happy new year in a few days ;)